M24C32-FMB5TG STMicroelectronics, M24C32-FMB5TG Datasheet - Page 31

• Manufacturer Part Number: M24C32-FMB5TG
• Description: EEPROM 32Kbit 100kHz I2C 400 kHZ Fast-Mode
• Manufacturer: STMicroelectronics

Specifications of M24C32-FMB5TG

• Product Category: EEPROM
• Rohs: yes
• Memory Size: 32 Kbit
• Organization: 4 K x 8
• Data Retention: 40 yr
• Maximum Clock Frequency: 0.4 MHz
• Maximum Operating Current: 3 mA
• Operating Supply Voltage: 1.8 V , 2.5 V , 3.3 V , 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: UFDFPN
• Access Time: 900 ns
• Interface Type: I2C
• Minimum Operating Temperature: - 20 C
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 1.7 V

M24C32-W M24C32-R M24C32-F M24C32-X M24C32-DF
Table 19.
1. Only for M24C32 devices identified by the process letter K (devices qualified at 1 MHz).
2. There is no min. or max. values for the input signal rise and fall times. It is however recommended by the
3. Characterized only, not tested in production.
4. With C
5. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or
6. t
7. WC=0 set up time condition to enable the execution of a WRITE command.
8. WC=0 hold time condition to enable the execution of a WRITE command.
9. 10 ms for the M24C32-X, when V
t
t
DHWH
t
WLDL
QL1QL2
Symbol
t
t
t
t
XH1XH2
CLQX
CLQV
XL1XL2
t
t
t
t
t
t
t
t
t
I²C specification that the input signal rise and fall times be less than 120 ns when f
rising edge of SDA.
0.7 V
CHDH
CHCL
CLCH
DXCX
CLDX
CHDL
DHDL
CLQV
DLCL
NS
t
f
W
C
(7)(3)
(3)
(8)(3)
(5)
(6)
CC
(3)
is the time (from the falling edge of SCL) required by the SDA bus line to reach either 0.3 V
L
, assuming that the Rbus × Cbus time constant is within the values specified in
= 10 pF.
t
t
t
t
t
t
1 MHz AC characteristics
t
SU:STO
SU:DAT
HD:DAT
SU:STA
HD:STA
SU:WC
HD:WC
t
t
f
t
HIGH
Alt.
t
LOW
t
t
BUF
SCL
WR
t
DH
t
t
AA
R
F
F
Clock frequency
Clock pulse width high
Clock pulse width low
Input signal rise time
Input signal fall time
SDA (out) fall time
Data in setup time
Data in hold time
Data out hold time
Clock low to next data valid (access time)
Start condition setup time
Start condition hold time
Stop condition setup time
Time between Stop condition and next Start
condition
WC set up time (before the Start condition)
WC hold time (after the Stop condition)
Write time
Pulse width ignored (input filter on SCL and
SDA)
CC
Doc ID 4578 Rev 21
< 1.7 V.
Parameter
(1)
Min.
20
260
500
100
250
250
250
500
50
(2)
(2)
0
0
0
1
-
-
DC and AC parameters
(4)
C
< 1 MHz.
Figure
Max.
120
450
5
80
(2)
(2)
1
-
-
-
-
-
-
-
-
-
-
-
(9)
12.
CC
or
MHz
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
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