CAT24C256YIGT3JN ON Semiconductor, CAT24C256YIGT3JN Datasheet - Page 2

• Manufacturer Part Number: CAT24C256YIGT3JN
• Description: EEPROM
• Manufacturer: ON Semiconductor

Specifications of CAT24C256YIGT3JN

• Memory Size: 256 kbit
• Organization: 32768 x 8
• Data Retention: 100 yr
• Maximum Clock Frequency: 400 kHz
• Maximum Operating Current: 1 mA
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-8
• Minimum Operating Temperature: - 40 C
• Operating Current: 1 mA
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 1.8 V

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The DC input voltage on any pin should not be lower than −0.5 V or higher than V
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
3. Page Mode, V
4. The new product revision (E) uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when
5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
6. When not driven, the WP pin is pulled down to GND internally. For improved noise immunity, the internal pull−down is relatively strong;
Table 1. ABSOLUTE MAXIMUM RATINGS
Table 2. RELIABILITY CHARACTERISTICS
Table 3. D.C. OPERATING CHARACTERISTICS − Mature Product (Rev D)
(
Table 4. PIN IMPEDANCE CHARACTERISTICS − Mature Product (Rev D)
(V
N
V
Storage Temperature
Voltage on any Pin with Respect to Ground (Note 1)
Symbol
C
C
I
undershoot to no less than −1.5 V or overshoot to no more than V
and JEDEC test methods.
a single byte has to be written, 4 bytes (including the ECC bits) are re−programmed. It is recommended to write by multiple of 4 bytes in order
to benefit from the maximum number of write cycles.
CC
and JEDEC test methods.
therefore the external driver must be able to supply the pull−down current when attempting to drive the input HIGH. To conserve power, as
the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x V
variable WP input impedance is available only for Die Rev. C and higher.
END
CC
WP
V
V
I
IN
IN
CCR
I
V
I
V
Symbol
CC
OL1
OL2
SB
I
L
IH
IL
= 2.5 V to 5.5 V, T
Symbol
= 2.5 V to 5.5 V, T
(Note 5)
(Note 5)
(Note 6)
(Notes 3, 4)
T
DR
Read Current
Write Current
Standby Current
I/O Pin Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output Low Voltage
CC
SDA I/O Pin Capacitance
Input Capacitance (other pins)
WP Input Current
= 5 V, 25°C.
Parameter
Endurance
Data Retention
A
A
= −40°C to +125°C, and V
= −40°C to +125°C, and V
Parameter
Parameters
Read, f
Write, f
All I/O Pins at GND or V
Pin at GND or V
V
V
CC
CC
≥ 2.5 V, I
< 2.5 V, I
SCL
SCL
Parameter
(Note 2)
CC
CC
= 400 kHz
= 400 kHz
OL
OL
= 1.8 V to 5.5 V, T
= 1.8 V to 5.5 V, T
CC
= 3.0 mA
= 1.0 mA
http://onsemi.com
V
V
V
V
V
V
Test Conditions
IN
IN
IN
IN
IN
IN
< V
< V
< V
> V
= 0 V
= 0 V
CC
IH
IH
IH
IH
, V
, V
, V
2
CC
CC
CC
CC
+ 1.5 V, for periods of less than 20 ns.
A
A
= 5.5 V
= 3.3 V
= 1.8 V
T
T
T
T
= −40°C to +85°C, unless otherwise specified.)
CC
= −40°C to +85°C, unless otherwise specified.)
A
A
A
A
Conditions
= −40°C to +85°C
= −40°C to +125°C
= −40°C to +85°C
= −40°C to +125°C
), the strong pull−down reverts to a weak current source. The
CC
+ 0.5 V. During transitions, the voltage on any pin may
1,000,000
Min
100
V
–65 to +150
–0.5 to +6.5
CC
−0.5
Min
Ratings
x 0.7
Program/Erase Cycles
Max
130
120
80
V
V
8
6
1
CC
CC
Max
0.4
0.2
1
3
1
2
1
2
Years
Units
+ 0.5
x 0.3
Units
Units
Units
°C
pF
pF
mA
V
mA
mA
mA
mA
V
V
V
V