M95128-DFMN6TP STMicroelectronics, M95128-DFMN6TP Datasheet - Page 25

• Manufacturer Part Number: M95128-DFMN6TP
• Description: EEPROM Automotive 128kBit SPI High Speed Clock
• Manufacturer: STMicroelectronics

Specifications of M95128-DFMN6TP

• Rohs: yes

M95128-W M95128-R M95128-DF
6.6.1
Cycling with Error Correction Code (ECC)
M95128 and M95128-D devices offer an Error Correction Code (ECC) logic. The ECC is an
internal logic function which is transparent for the SPI communication protocol.
The ECC logic is implemented on each group of four EEPROM bytes
single bit out of the four bytes happens to be erroneous during a Read operation, the ECC
detects this bit and replaces it with the correct value. The read reliability is therefore much
improved.
Even if the ECC function is performed on groups of four bytes, a single byte can be
written/cycled independently. In this case, the ECC function also writes/cycles the three
other bytes located in the same group
defined at group level and the cycling can be distributed over the four bytes of the group: the
sum of the cycles seen by byte0, byte1, byte2 and byte3 of the same group must remain
below the maximum value defined in
c. A group of four bytes is located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where N is an integer.
Doc ID 5798 Rev 16
Table
(c)
. As a consequence, the maximum cycling budget is
14.
(c)
. Inside a group, if a
Instructions
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