AT24C01C-SSHM-B Atmel, AT24C01C-SSHM-B Datasheet - Page 6

• Manufacturer Part Number: AT24C01C-SSHM-B
• Description: EEPROM 1K 2-WIRE 8 SOIC PB HALOFREE NiPdAu 1.7V
• Manufacturer: Atmel

Specifications of AT24C01C-SSHM-B

• Rohs: yes
• Memory Size: 1 kbit
• Organization: 128 x 8
• Data Retention: 100 yr
• Maximum Clock Frequency: 400 kHz, 1 GHz
• Maximum Operating Current: 3 mA
• Operating Supply Voltage: 1.7 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Interface Type: 2-Wire, I2C
• Minimum Operating Temperature: - 55 C
• Operating Current: 1 mA
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 1.7 V

6.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may
change only during SCL low time periods (see
a Start or Stop condition as defined below.
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any
other command (see
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop
command will place the EEPROM in a standby power mode (see
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.
Standby Mode: The AT24C01C/02C features a low power standby mode which is enabled:
2-wire Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be reset by
following these steps:
The device is ready for the next communication after above steps have been completed.
Figure 6-1. Software reset


1.
2.
3.
SDA
SCL
Upon power-up.
After the receipt of the stop bit and the completion of any internal operations.
Create a start bit condition.
Clock nine cycles.
Create another start bit followed by stop bit condition as shown in
Start
Bit
Figure 6-5 on page
1
8).
2
Figure 6-4 on page
Dummy Clock Cycles
3
Figure 6-5 on page
8). Data changes during SCL high periods will indicate
Atmel AT24C01C/02C [DATASHEET]
8
Figure
6-1.
9
8).
Start
Bit
8700F–SEEPR–6/12
Stop
Bit
6