DS28E05P+T Maxim Integrated, DS28E05P+T Datasheet - Page 10
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DS28E05P+T
Manufacturer Part Number
DS28E05P+T
Description
EEPROM 1W 1KB FTP MEMORY TSOC
Manufacturer
Maxim Integrated
Datasheet
1.DS28E05PT.pdf
(17 pages)
Specifications of DS28E05P+T
Rohs
yes
Memory Size
1 KB
Organization
7 Pages x 16
Data Retention
10 yr
Maximum Operating Current
20 uA
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSOC-6
Interface Type
1-Wire
Minimum Operating Temperature
- 40 C
Operating Current
20 uA
Supply Voltage - Max
+ 4 V
Supply Voltage - Min
- 0.5 V
Part # Aliases
90-2805V+000
DS28E05
Read Memory [F0h]
The Read Memory command is used to read the memory. The command needs a 16-bit starting address TA1, TA2. The
parameter byte specifies the lower address byte (TA1, T[6:0]) where the reading begins. After the parameter byte, the
master transmits TA2 (T[15:8]), which must be 00 to be valid. The reading can start at any valid starting address and
continue trough the end of the memory. If memory page 7 is read and the master continues reading, the resulting data
is FFh. The master can end the Read Memory command at any time by issuing a reset pulse.
Table 4. Parameter Byte Bitmap
Note: The bit marked as 0 must be transmitted as 0 for the parameter byte to be valid.
1-Wire Bus System
The 1-Wire bus is a system that has a single bus master
and one or more slaves. In all instances the DS28E05
is a slave device. The discussion of this bus system is
broken down into three topics: hardware configuration,
transaction sequence, and 1-Wire signaling (signal types
and timing). The 1-Wire protocol defines bus transactions
in terms of the bus state during specific time slots, which
are initiated on the falling edge of sync pulses from the
bus master.
Figure 7. Hardware Configuration
www.maximintegrated.com
Read Memory
Command Code
Parameter Byte
Restrictions
Protocol Variations
Error conditions
CS Byte
BIT 7
0
BIT 6
Rx
Tx
F0h
Starting memory address (Table 4).
None. This command can be issued at any time.
None.
Invalid parameter byte.
N/A
BUS MASTER
BIT 5
OPEN-DRAIN
PORT PIN
BIT 4
Tx = TRANSMIT
Rx = RECEIVE
V
PUP
R
PUP
Hardware Configuration
The 1-Wire bus has only a single line by definition; it is
important that each device on the bus be able to drive
it at the appropriate time. To facilitate this, each device
attached to the 1-Wire bus must have open-drain or three-
state outputs. The 1-Wire port of the DS28E05 is open
drain with an internal circuit equivalent to that shown in
Figure 7.
BIT 3
TA1
DATA
I
L
DS28E05 1-Wire PORT
100 Ω MOSFET
BIT 2
Rx
Tx
1-Wire EEPROM
BIT 1
Maxim Integrated │ 10
BIT 0