AT24MAC402-SSHM-T Atmel, AT24MAC402-SSHM-T Datasheet - Page 16

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AT24MAC402-SSHM-T

Manufacturer Part Number
AT24MAC402-SSHM-T
Description
EEPROM 2-Kbit Serial EEPROM
Manufacturer
Atmel
Datasheet

Specifications of AT24MAC402-SSHM-T

Rohs
yes
Memory Size
2 Kbit
Organization
256 B x 8
Data Retention
100 yr
Maximum Clock Frequency
1000 KHz
Maximum Operating Current
6 uA
Operating Supply Voltage
1.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
Since the address pointer of the device is shared between the regular EEPROM array, the serial number block, and the
EUI block, a dummy write sequence should be performed to ensure the address pointer is set to the correct starting EUI-
48 or EUI-64 address. Random reads of the EUI block are supported, but if the previous operation was to the EEPROM
array or to the serial number block, the address pointer will retain the last location accessed, incremented by one.
Reading the EUI data from a location other than the correct starting EUI address of the block will not result in a unique
EUI data value.
Additionally, the most-significant four bits of the word address must be ‘1001’(9h). Therefore, if the application desires
to read the pre-programmed EUI value, then the corresponding word address input would be 9Ah in the AT24MAC402
and 98h for the AT24MAC602. If a word address other than 9Ah or 98h respectively is used, the device will output
undefined data.
Once the EUI block of six or eight bytes of data have been clocked out of the device, the EUI read operation will end
when the microcontroller does not respond with a zero or acknowledge, but then creates a Stop condition. It is important
to note that the data word address will not roll-over back to the beginning of the respective EUI starting address. If the
read operation continues past the last EUI data value, the data word address will roll-over back to the beginning of the
extended memory block where the 128-bit serial number will begin to read out. Therefore, every EUI read sequence
attempt requires a valid starting address in the dummy write sequence as shown in
Checking the Permanent Write Protect Register (PSWP) Status: Determining the status of the Permanent Write
Protect Register can be accomplished by sending a similar command to the device as was used when programming the
register, except the R/W bit must be set to one. If the device responds with an acknowledge, the Permanent Write Protect
Register has not been programmed; otherwise, it has been programmed and the first-half of the array is permanently
write protected.
Checking the Reversible Write Protect Register (RSWP) Status: Determining the status of the Reversible Write
Protect Register can be accomplished by sending a similar command to the device as was used when programming the
register, except the R/W bit must be set to one. If the device returns an acknowledge, the Reversible Write Protect
Register has not been programmed; otherwise, it has been programmed and the first-half of the array is write protected,
but remains reversible.
Table 8-1.
Figure 8-1. Byte Write
SDA LINE
Command
Read PSWP
Read RSWP
S
R
T
A
T
PSWP and RSWP Status
M
S
B
Address
Device
A
A
0
2
2
S
B
L
W
W
R
R
E
T
I
/
Pin
A
A
0
A
C
K
1
1
Address
A
A
A
Word
0
0
0
Bit 7
0
0
C
A
K
Atmel AT24MAC402/602 [PRELIMINARY DATASHEET]
Bit 6
Data
1
1
Bit 5
1
1
A
C
K
O
S
T
P
Preamble
Bit 4
0
0
Figure 8-7 on page
Bit 3
A
0
2
Bit 2
A
0
8807B–SEEPR–9/2012
1
18.
Bit 1
A
1
0
Bit 0
R/W
1
1
16

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