DAC1008D750HN/C1 NXP Semiconductors, DAC1008D750HN/C1 Datasheet - Page 42

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DAC1008D750HN/C1

Manufacturer Part Number
DAC1008D750HN/C1
Description
Digital to Analog Converters - DAC DL 10BIT DAC 750MSPS 2X 4X OR 8X INT
Manufacturer
NXP Semiconductors
Datasheet

Specifications of DAC1008D750HN/C1

Rohs
yes
Factory Pack Quantity
260
NXP Semiconductors
Table 19.
Default settings are shown highlighted.
Table 20.
Default settings are shown highlighted.
Table 21.
Table 22.
Table 23.
DAC1008D750
Product data sheet
Bit
1 to 0
Bit
7
6
5
4 to 3
2 to 1
0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Symbol
INT_FIR[1:0]
Symbol
PLL_PD
-
-
PLL_DIV[1:0]
PLL_PHASE[1:0]
PLL_POL
Symbol
FREQ_NCO[7:0]
Symbol
FREQ_NCO[15:8]
Symbol
FREQ_NCO[23:16]
TXCFG register (address 01h) bit description
PLLCFG register (address 02h) bit description
FREQNCO_LSB register (address 03h) bit description
FREQNCO_LISB register (address 04h) bit description
FREQNCO_UISB register (address 05h) bit description
All information provided in this document is subject to legal disclaimers.
Access
R/W
Access
R/W
R/W
R/W
R/W
R/W
R/W
Access
R/W
Access
R/W
Access
R/W
Rev. 3 — 31 January 2012
…continued
Value
00
01
10
11
Value
0
1
0
0
00
01
10
00
01
10
11
0
1
Value
66h
Value
66h
Value
66h
2, 4 or 8 interpolating DAC with JESD204A
Description
interpolation
Description
PLL
undefined
must be written with ’0’
PLL divider factor
PLL phase shift of f
clock edge of DAC (f
Description
lower 8 bits for the NCO frequency setting
Description
lower intermediate 8 bits for the NCO frequency
setting
Description
upper intermediate 8 bits for the NCO frequency
setting
no interpolation
2
4
8
switched on
switched off
2
4
8
0
120
240
undefined
normal
inverted
DAC1008D750
s
s
)
© NXP B.V. 2012. All rights reserved.
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