74LVTN16245BDGG,11 NXP Semiconductors, 74LVTN16245BDGG,11 Datasheet
74LVTN16245BDGG,11
Specifications of 74LVTN16245BDGG,11
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74LVTN16245BDGG,11 Summary of contents
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V 16-bit transceiver; 3-state Rev. 5 — 5 April 2012 1. General description The 74LVTN16245B is a high-performance BiCMOS product designed for V at 3.3 V. This device is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs ...
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... NXP Semiconductors 4. Functional diagram 1DIR 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 Fig 1. Logic symbol 74LVTN16245B Product data sheet 2DIR 1OE 2A0 1B0 2A1 1B1 2A2 1B2 2A3 1B3 2A4 1B4 2A5 1B5 2A6 1B6 2A7 1B7 All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors Fig 2. IEC logic symbol 74LVTN16245B Product data sheet 1OE G3 1DIR 3EN1[BA] 3EN2[AB] 2OE G6 2DIR 6EN4[BA] 6EN5[AB] 1A0 1 1B0 2 1A1 1B1 1A2 1B2 1A3 1B3 1A4 1B4 1A5 1B5 1A6 1B6 1A7 1B7 2A0 4 2B0 5 2A1 2B1 2A2 2B2 2A3 ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 3. Pin configuration SOT362-1 (TSSOP48) 74LVTN16245B Product data sheet 74LVTN16245B 1DIR 1 1B0 2 3 1B1 4 GND 1B2 5 1B3 1B4 1B5 9 GND 10 1B6 11 1B7 12 13 2B0 2B1 14 GND 15 2B2 16 17 2B3 2B4 19 2B5 20 GND 21 22 ...
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... NXP Semiconductors terminal 1 index area (1) This is not a supply pin, the substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad however soldered the solder land should remain floating or be connected to GND. Fig 4. Pin configuration SOT1134-2 (HXQFN60) ...
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... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin SOT362-1 1DIR, 2DIR 1, 24 1B0 to 1B7 11, 12 2B0 to 2B7 13, 14, 16, 17, 19, 20, 22, 23 GND 4, 10, 15, 21, 28, 34, 39 18, 31 1OE, 2OE 48, 25 2A0 to 2A7 36, 35, 33, 32, 30, 29, 27, 26 ...
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... NXP Semiconductors Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter P total power dissipation tot [1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. ...
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... NXP Semiconductors Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I input leakage current I I power-off leakage current V OFF I output leakage current LO I power-up/power-down O(pu/pd) output current I supply current CC I additional supply current CC C input capacitance ...
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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter = 40 C to +85 C T amb t LOW to HIGH PLH propagation delay t HIGH to LOW PHL propagation delay t OFF-state to HIGH PZH propagation delay t OFF-state to LOW ...
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... NXP Semiconductors 11. Waveforms Measurements points are given in V and V are typical voltage output levels that occur with the output load Fig 5. Propagation delay input (nAn, nBn) to output (nBn, nAn) nOE input nAn or nBn output nBn or nAn output Measurements points are given in ...
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... NXP Semiconductors negative positive Test data is given in Table 9. Definitions test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 7. Test circuit for measuring switching times Table 9 ...
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... NXP Semiconductors 12. Package outline TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6 pin 1 index 1 e DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors HXQFN60: plastic compatible thermal enhanced extremely thin quad flat package; no leads; 60 terminals; body 0.5 mm terminal 1 index area A11 A10 terminal 1 index area D5 D1 A32 eT eR Dimensions Unit max 0 ...
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... NXP Semiconductors 13. Abbreviations Table 10. Abbreviations Acronym Description BiCMOS Bipolar Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date 74LVTN16245B v.5 20120405 • Modifications: For type number 74LVTN16245BBX the SOT code has changed to SOT1134-2 74LVTN16245B v ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... Product data sheet NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 Functional description . . . . . . . . . . . . . . . . . . . 6 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 13 Abbreviations ...