DR-WLS1273L-102 RFM, DR-WLS1273L-102 Datasheet - Page 4

• Manufacturer Part Number: DR-WLS1273L-102
• Description: WiFi / 802.11 Modules 2.4 and 5.8GHz + BT
• Manufacturer: RFM

Specifications of DR-WLS1273L-102

• Rohs: yes
• Protocol Supported: 802.11 a/b/g
• Frequency Band: 64 kHz to 4 GHz
• Data Rate: 1 Mbps, 2 Mbps, 5.5 Mbps, 11 Mbps
• Interface Type: SDIO, UART
• Operating Supply Voltage: 3 V to 4.2 V
• Supply Current Transmitting: 350 mA
• Supply Current Receiving: 150 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Modulation Technique: CCK, DSSS

• Baseband Processor
• 2.4/5.8 GHz Radio
DR-WLS1273L-102 Bluetooth Features
• V4.0 + EDR, Power Class 1.5 + BLE
• Bluetooth Qualified Design Listing: B017988
• BT Enhanced Data Rates - 2 and 3 Mbps
• Enhanced UART host interface
• Very low power consumption
• On-chip Embedded radio
• Embedded ARM microprocessor system
• Flexible PCM interface - full flexibility for data order, sampling and positioning
• Temperature detection and compensation mechanism ensures minimal variation in the RF performance
• Low-power scan achieves paging and inquiry scans at 1/3 normal power
• Digital Radio Processor (DRP) single-ended 50 ohm I/O for easy RF interfacing
• Patch trap mechanism and reserved RAM enables easy bug fixes
• Advance Audio Interfaces and capabilities
WLAN Functional Blocks
The DR-WLS1273L-102 WLAN architecture includes a digital radio processor and a point-to-multipoint
baseband core function. The architecture is based on a single-processor ARM core. The device includes
on-chip peripherals to enable easy communication between a host system and the WLAN core function.
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© 2012 by RF Monolithics, Inc.
over the entire operating temperature range
– IEEE Std 802.11n single-stream data rates (MCS0-7) and SGI support
– Digital Radio Processor (DRP) implementation
– Integrated LNA
– Supports IEEE Std 802.11a/b/g and 802.11n
– Integrated 2.4 GHz RF transceiver
– All digital PLL transmitter with digitally controlled oscillator
– Near-zero IF architecture
– On-chip TX/RX switch
– Support for Class-1.5 applications
– High rate four wire UART HCI (H4) and three wire UART HCI (H5)
– Automatic clock-detection mechanism
– A2DP support
– A2DP internal loopback
– Wide-band speech support
– On board SBC encoder/decoder - offloads host for A2DP and wide-band speech processing
– Full support for Bluetooth low energy (BLE) standard. BLE can operate in parallel with standard
Bluetooth function.
Technical support +1.972.448.3700
E-mail:
[e-mail]
DR-WLS1273L-102 Data Sheet - 12/13/12
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