74HC4050D,652 NXP Semiconductors, 74HC4050D,652 Datasheet - Page 2

• Manufacturer Part Number: 74HC4050D,652
• Description: IC SHIFTER HEX HIGH-LOW 16SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCr

Specifications of 74HC4050D,652

• Logic Type: Buffer/Line Driver, Non-Inverting
• Package / Case: 16-SOIC (3.9mm Width)
• Number Of Elements: 6
• Number Of Bits Per Element: 1
• Current - Output High, Low: 5.2mA, 5.2mA
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Supply Voltage: 2 V ~ 6 V
• Output Type: Logic
• Input Type: Logic
• Number Of Channels: 6
• Logic Family: 74HC
• Number Of Channels Per Chip: 6
• Polarity: Non-Inverting
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 5.2 mA
• Input Bias Current (max): 2 uA
• Low Level Output Current: 5.2 mA
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Propagation Delay Time: 26 ns
• Number Of Lines (input / Output): 6 / 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-1453-5; 74HC4050D; 933714810652

Philips Semiconductors
FEATURES
GENERAL DESCRIPTION
The 74HC4050 is a high-speed Si-gate CMOS device and
is pin compatible with the “4050” of the “4000B” series. It
is specified in compliance with JEDEC standard no. 7A.
The 74HC4050 provides six non-inverting buffers with a
modified input protection structure, which has no diode
connected to V
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
ORDERING INFORMATION
See
December 1990
t
C
C
PHL
Output capability: standard
I
Hex high-to-low level shifter
I
PD
SYMBOL
CC
f
f
C
V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
/ t
CC
PD
= input frequency in MHz
L
category: SSI
= output frequency in MHz
(C
= output load capacitance in pF
PLH
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
L
D
= C
V
amb
CC
PD
CC
2
propagation delay nA to nY
input capacitance
power dissipation capacitance per buffer
. Input voltages of up to 15 V may
= 25 C; t
V
f
o
CC
) = sum of outputs
2
f
r
i
= t
+ (C
PARAMETER
f
= 6 ns
L
V
CC
2
f
o
) where:
2
.
C
note 1
therefore be used. This feature enables the non-inverting
buffers to be used as logic level translators, which will
convert high level logic to low level logic, while operating
from a low voltage power supply. For example 15 V logic
(“4000B series”) can be converted down to 2 V logic.
The actual input switch level remains related to the V
and is the same as mentioned in the family characteristics.
APPLICATIONS
L
D
Converting 15 V logic (“4000B” series) down to 2 V logic.
= 15 pF; V
in W):
CONDITIONS
CC
= 5 V
7
3.5
14
TYPICAL
HC
Product specification
74HC4050
ns
pF
pF
UNIT
CC