STM32F205REY6TR STMicroelectronics, STM32F205REY6TR Datasheet - Page 169

• Manufacturer Part Number: STM32F205REY6TR
• Description: ARM Microcontrollers - MCU 32-Bit ARM Cortex 512kb Connectivity
• Manufacturer: STMicroelectronics

Specifications of STM32F205REY6TR

• Product Category: ARM Microcontrollers - MCU
• Rohs: yes
• Core: ARM Cortex M3
• Data Bus Width: 32 bit

STM32F20xxx
Table 94.
22-Apr-2011
Date
Document revision history (continued)
Revision
6
Changed datasheet status to “Full Datasheet”.
Introduced concept of SRAM1 and SRAM2.
LQFP176 package now in production and offered only for 256 Kbyte
and 1 Mbyte devices. Availability of WLCSP64+2 package limited to
512 Kbyte and 1 Mbyte devices.
Updated
and STM32F2xx for LQFP144 package
board design between STM32F10xx and STM32F2xx for LQFP100
package.
Added camera interface for STM32F207Vx devices in
STM32F205xx features and peripheral
Removed 16 MHz internal RC oscillator accuracy in
Clocks and
Updated
Modified I
startup,
Section 2.2.30: Audio PLL
Updated
backup registers
General-purpose timers
Modified maximum baud rate (oversampling by 16) for USART1 in
Table 5: USART feature
Updated note related to RFU pin below
LQFP100
STM32F20x LQFP176
ballout, and
In
I2S3_CK to I2S2_SCK and I2S3_SCK, respectively; added PA15 and
TT (3.6 V tolerant I/O).
Added RTC_50Hz as PB15 alternate function in
pin and ball definitions
Removed ETH _RMII_TX_CLK for PC3/AF11 in
function
Updated
characteristics.
T
Added CEXT, ESL, and ESR in
as well as
Modified
power supply
Updated
(regulator
power-down (regulator
Added OSC_OUT pin in
Figure 16: Pin input
Updated
REGOFF pins and modified notes.
Updated V
I
power control block
RUSH
STG
Table 6: STM32F20x pin and ball
Doc ID 15818 Rev 9
updated to –65 to +150 in
, added E
Section 2.2.24: Inter-integrated sound
mapping.
Figure 3: Compatible board design between STM32F10xx
Section 2.2.16: Voltage
Section 2.2.17: Real-time clock (RTC), backup SRAM and
Table 9: Voltage characteristics
Note 4
Table 15: Operating conditions at power-up / power-down
Figure 17: Power supply scheme
2
pinout,
ON), and
Section 5.3.2: VCAP1/VCAP2 external
PVD
S sampling frequency range in
startup.
Table 6: STM32F20x pin and ball
range.
, V
RUSH
in
BOR1
and description of TIM2 and TIM5 in
Figure 11: STM32F20x LQFP144
Table 13: Limitations depending on the operating
characteristics.
Table 16: Operating conditions at power-up /
voltage.
and
, V
and
pinout,
OFF).
comparison.
(TIMx).
BOR2
Figure 15: Pin loading
Note 3
(PLLI2S).
Table 8: Alternate function
, V
Changes
Figure 13: STM32F20x UFBGA176
Table 12: General operating conditions
Table 11: Thermal
BOR3
in
regulator.
Table 17: Embedded reset and
definitions,:changed I2S2_CK and
, T
counts.
Figure 10: STM32F20x
and
RSTTEMPO
and
Section 2.2.12: Clocks and
to add IRROFF and
Figure 2: Compatible
Table 8: Alternate
Table 10: Current
definitions.
(I2S), and
conditions. and
Table 6: STM32F20x
capacitor.
typical value, and
characteristics.
pinout,
Revision history
Section 2.2.12:
Table 2:
Section :
mapping.
Figure 12:
169/177