MPC8308ZQAGDA Freescale Semiconductor, MPC8308ZQAGDA Datasheet - Page 29
MPC8308ZQAGDA
Manufacturer Part Number
MPC8308ZQAGDA
Description
Microprocessors - MPU E300 MP Pb 400
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8308VMAGDA.pdf
(83 pages)
Specifications of MPC8308ZQAGDA
Processor Series
MPC8308
Core
e300
Maximum Clock Frequency
400 MHz
Interface Type
I2C, JTAG, UART
Operating Supply Voltage
0.95 V to 1.05 V
Maximum Operating Temperature
0 C to + 105 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-473
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10.2.3
With on-chip termination to XCOREVSS, the differential reference clocks inputs are high-speed current
steering logic (HCSL) compatible and DC coupled.
Many other low voltage differential type outputs like low-voltage differential signaling (LVDS) can be
used but may need to be AC-coupled due to the limited common mode input range allowed (100–400 mV)
for DC-coupled connection.
LVPECL outputs can produce signal with too large amplitude and may need to be DC-biased at clock
driver output first, then followed with series attenuation resistor to reduce the amplitude, in addition to
AC-coupling.
Freescale Semiconductor
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
Figure 17. Differential Reference Clock Input DC Requirements (External DC-Coupled)
Figure 18. Differential Reference Clock Input DC Requirements (External AC-Coupled)
Interfacing with Other Differential Signaling Levels
SD_REF_CLK
SD_REF_CLK
Figure 19. Single-Ended Reference Clock Input DC Requirements
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
200mV < Input Amplitude or Differential Peak < 800mV
200 mV < Input Amplitude or Differential Peak < 800mV
400 mV < SD_REF_CLK Input Amplitude < 800 mV
High-Speed Serial Interfaces (HSSI)
100 mV < Vcm < 400 mV
Vmin > Vcm – 400 mV
Vmax < Vcm + 400 mV
0 V
Vmax < 80 0mV
Vmin > 0 V
Vcm
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