MPXN2120VMG116 Freescale Semiconductor, MPXN2120VMG116 Datasheet - Page 23

• Manufacturer Part Number: MPXN2120VMG116
• Description: Microprocessors - MPU 32BIT2M NVM GATEWAY
• Manufacturer: Freescale Semiconductor

Specifications of MPXN2120VMG116

• Rohs: yes
• Processor Series: PXN21
• Core: e200
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 60 MHz
• Program Memory Size: 2 MB
• Data Ram Size: 32 KB
• Interface Type: CAN, I2C, SPI, UART
• Operating Supply Voltage: - 0.3 V to + 1.32 V
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-208
• Number Of Programmable I/os: 155

1
2
3
4
Freescale Semiconductor
PK6
PK7
PK8
PK9
PK10
EXTAL EXTAL
XTAL
TDI
TDO
TMS
TCK
JCOMP JCOMP
TEST
RESET RESET
Name
The primary signal name is used as the pin label on the BGA map for identification purposes.
Each line in the Signal Name column corresponds to a separate signal function on the pin. For all device I/O pins, the primary,
alternate, or GPIO signal functions are designated in the PA field of the System Integration Unit (SIU) PCR registers except
where explicitly noted.
The GPIO number is the same as the corresponding pad configuration register (SIU_PCRn) number.
The PA bitfield in the SIU_PCRn register selects the signal function for the pin. A dash in the Description field of this table
indicates that this value for PC is reserved on this pin, and should not be used.
Pin
1
PK[6]
FR_B_RX
PCS_B[1]
PCS_C[4]
PK[7]
FR_B_TX
PCS_B[2]
PCS_C[5]
PK[8]
FR_B_TX_EN
PCS_B[3]
PCS_A[1]
PK[9]
CLKOUT
PCS_D[1]
PCS_A[2]
BOOTCFG
PK[10]
PCS_B[5]
PCS_D[2]
PCS_A[3]
EXTCLK
XTAL
TDI
TDO
TMS
TCK
TEST
Functions
Supported
2
150
151
152
153
154
(PCR)
Num
GPIO
—
—
—
—
—
—
—
—
—
3
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
PA
— Main Crystal Oscillator Input
— Main Crystal Oscillator Output
— JTAG Test Data Input
— JTAG Test Data Output
— JTAG Test Mode Select Input
— JTAG Test Clock Input
— JTAG Compliancy
— Test Mode Select
— External Reset
4
Table 3. PXN20 signal properties (continued)
Port K GPIO
FlexRay B Receive Data
DSPI_B Peripheral Chip Select
DSPI_C Peripheral Chip Select
Port K GPIO
FlexRay B Transmit Data
DSPI_B Peripheral Chip Select
DSPI_C Peripheral Chip Select
Port K GPIO
FlexRay B Transmit Enable
DSPI_B Peripheral Chip Select
DSPI_A Peripheral Chip Select
Port K GPIO
CLKOUT (User mode)
DSPI_D Peripheral Chip Select
DSPI_A Peripheral Chip Select
Boot Configuration
Port K GPIO
DSPI_B Peripheral Chip Select
DSPI_D Peripheral Chip Select
DSPI_A Peripheral Chip Select
External Clock Input
PXN20 Microcontroller Data Sheet, Rev. 1
Description
Miscellaneous Pins (9)
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Volt-
DDSYN
DDSYN
age
DDE2
DDE2
DDE2
DDE2
DDE2
DDE2
DDE2
DDE2
DDE2
DDE2
DDE3
DDE1
Type
Pad
MH
MH
MH
MH
MH
MH
SH
SH
SH
SH
SH
IH
A
A
5
BOOT
CFG
(Pull-
down)
During
Reset
JCOMP (Pull Down)
RESET (Pull Up)
TCK (Pull Down)
TDO (Pull Up
TMS (Pull Up)
TDI (Pull Up)
—
—
—
—
Status
EXTAL
TEST
6
XTAL
GPIO
Reset
After
9
—
—
—
—
Pin assignments
8
7
)
Package Pin
Locations
BGA
M13
208
A14
A13
A11
R5
R6
M3
T5
T6
P6
P3
K3
J3
L3
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