74AUP1T57GF,132 NXP Semiconductors, 74AUP1T57GF,132 Datasheet - Page 12

IC LP CONFIG GATE V-XLATR 6-XSON

74AUP1T57GF,132

Manufacturer Part Number
74AUP1T57GF,132
Description
IC LP CONFIG GATE V-XLATR 6-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1T57GF,132

Package / Case
6-XSON, SOT891
Logic Function
Translator
Number Of Bits
2
Input Type
Voltage
Output Type
Voltage
Number Of Channels
2
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3.8ns
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Supply Voltage
2.3 V ~ 3.6 V
Logic Type
Voltage Level Translator
Logic Family
AUP
Input Bias Current (max)
50 mA
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
8.2 ns @ 2.3 V to 2.7 V or 7 ns @ 3 V to 3.6 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Maximum Power Dissipation
250 mW
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
74AUP1T57GF-H
74AUP1T57GF-H
935281364132
NXP Semiconductors
13. Package outline
Fig 14. Package outline SOT363 (SC-88)
74AUP1T57
Product data sheet
Plastic surface-mounted package; 6 leads
DIMENSIONS (mm are the original dimensions)
UNIT
mm
VERSION
OUTLINE
SOT363
1.1
0.8
A
max
0.1
A 1
6
1
0.30
0.20
b p
y
IEC
pin 1
index
e 1
0.25
0.10
c
D
e
2
5
2.2
1.8
b p
D
All information provided in this document is subject to legal disclaimers.
JEDEC
1.35
1.15
E
4
3
REFERENCES
0
1.3
Rev. 3 — 21 July 2010
e
w
B
M
Low-power configurable gate with voltage-level translator
B
0.65
e
1
SC-88
JEITA
scale
1
H E
2.2
2.0
A
0.45
0.15
L p
A 1
2 mm
0.25
0.15
Q
H E
E
0.2
v
detail X
PROJECTION
0.2
EUROPEAN
w
L p
Q
0.1
74AUP1T57
y
A
c
© NXP B.V. 2010. All rights reserved.
X
v
ISSUE DATE
M
04-11-08
06-03-16
A
SOT363
12 of 20

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