LPC11E12FBD48/201, NXP Semiconductors, LPC11E12FBD48/201, Datasheet - Page 18

• Manufacturer Part Number: LPC11E12FBD48/201,
• Description: ARM Microcontrollers - MCU 16kB 1kB EE 6kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC11E12FBD48/201,

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC11E1x
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 1 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 250

NXP Semiconductors
LPC11E1X
Product data sheet
7.12.1 Features
7.11.1 Features
7.12 10-bit ADC
7.11 I
The LPC11E1x contain one I
The I
(SCL) and a Serial Data line (SDA). Each device is recognized by a unique address and
can operate as either a receiver-only device (e.g., an LCD driver) or a transmitter with the
capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
more than one bus master connected to the interface can be controlled the bus.
The LPC11E1x contains one ADC. It is a single 10-bit successive approximation ADC with
eight channels.
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C-bus serial I/O controller
Synchronous serial communication
Master or slave operation
8-frame FIFOs for both transmit and receive
4-bit to 16-bit frame
The I
interface supports Fast-mode Plus with bit rates up to 1 Mbit/s.
Easy to configure as master, slave, or master/slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
The I
10-bit successive approximation ADC.
Input multiplexing among 8 pins.
Power-down mode.
Measurement range 0 V to V
10-bit conversion time  2.44 s (up to 400 kSamples/s).
Burst conversion mode for single or multiple inputs.
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C-bus is bidirectional for inter-IC control using only two wires: a Serial Clock line
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C-interface is an I
C-bus can be used for test and diagnostic purposes.
C-bus controller supports multiple address recognition and a bus monitor mode.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 February 2012
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C-bus compliant interface with open-drain pins. The I
C-bus controller.
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32-bit ARM Cortex-M0 microcontroller
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C-bus is a multi-master bus, and
LPC11E1x
© NXP B.V. 2012. All rights reserved.
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C-bus
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