MAX1179CEUI Maxim Integrated, MAX1179CEUI Datasheet - Page 11

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MAX1179CEUI

Manufacturer Part Number
MAX1179CEUI
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1179CEUI

Number Of Channels
1
Architecture
SAR
Conversion Rate
135 KSPs
Resolution
16 bit
Input Type
Single-Ended
Snr
91 dB
Interface Type
Parallel
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Package / Case
TSSOP-28
Maximum Power Dissipation
1026 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.096 V
Figure 8. MAX1179 Transfer Function
Figure 10. MAX1189 Transfer Function
Figures 8, 9, and 10 show the MAX1179/MAX1187/
MAX1189’s output transfer functions. The MAX1179
and MAX1189 outputs are coded in offset binary, while
the MAX1187 is coded in standard binary.
Most applications require an input buffer amplifier to
achieve 16-bit accuracy and prevent loading the
source. Switch the channels immediately after acquisi-
tion, rather than near the end of or after a conversion
when the input signal is multiplexed. This allows more
time for the input buffer amplifier to respond to a large
11 . . . 1111
11 . . . 1110
10 . . . 0001
10 . . . 0000
00 . . . 0011
00 . . . 0010
11 . . . 1101
01 . . . 1111
00 . . . 0001
00 . . . 0000
11 . . . 1111
11 . . . 1110
10 . . . 0001
10 . . . 0000
00 . . . 0011
00 . . . 0010
11 . . . 1101
01 . . . 1111
00 . . . 0001
00 . . . 0000
OUTPUT CODE
OUTPUT CODE
-32768
-32768
-32767 -32765
-32767 -32765
16-Bit, 135ksps, Single-Supply ADCs with
-32766
-32766
______________________________________________________________________________________
INPUT VOLTAGE (LSB)
INPUT VOLTAGE (LSB)
INPUT RANGE = -10V TO +10V
INPUT RANGE = -5V TO +5V
-1
-1
FULL-SCALE
TRANSITION
FULL-SCALE
TRANSITION
0
0
+1
+1
Transfer Function
FULL-SCALE RANGE
(FSR) = +10V
+32766
FULL-SCALE RANGE
(FSR) = +20V
1LSB =
+32766
1LSB =
+32767
+32767
Input Buffer
+32768
+32768
65536 x 4.096
65536 x 4.096
FSR x V
FSR x V
REF
REF
Bipolar Analog Input Range
step-change in input signal. The input amplifier must
have a high enough slew rate to complete the required
output voltage change before the beginning of the
acquisition time. Figure 11 shows an example of this
circuit using the MAX427.
Figures 12a and 12b show how the MAX1179 and
MAX1189 analog input current varies depending on
whether the chip is operating or powered down. The
part is fully powered down between conversions if the
voltage at R/C is set high during the second falling
edge of CS. The input current abruptly steps to the
powered up value at the start of acquisition. This step
in the input current can disrupt the ADC input, depend-
ing on the driving circuit’s output impedance at high
frequencies. If the driving circuit cannot fully settle by
the end of acquisition time, the accuracy of the system
can be compromised. To avoid this situation, increase
the acquisition time, use a driving circuit that can settle
within t
up by setting the voltage at R/C low during the second
falling edge of CS.
For best performance, use printed circuit (PC) boards.
Do not run analog and digital lines parallel to each
other, and do not lay out digital signal paths under-
neath the ADC package. Use separate analog and dig-
ital ground planes with only one point connecting the
two ground systems (analog and digital) as close to the
device as possible.
Route digital signals far away from sensitive analog and
reference inputs. If digital lines must cross analog lines,
do so at right angles to minimize coupling digital noise
Figure 9. MAX1187 Transfer Function
11 . . . 111
11 . . . 110
11 . . . 101
00 . . . 011
00 . . . 010
00 . . . 001
00 . . . 000
ACQ
OUTPUT CODE
, or leave the MAX1179/MAX1189 powered
Layout, Grounding, and Bypassing
0
1
2
3
INPUT VOLTAGE (LSB)
INPUT RANGE = 0 TO +10V
FULL-SCALE
TRANSITION
FULL-SCALE RANGE
(FSR) = +10V
65534
1LSB =
65535
65536
65536 x 4.096
FSR x V
REF
11

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