STM32F372VBT6 STMicroelectronics, STM32F372VBT6 Datasheet - Page 100

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STM32F372VBT6

Manufacturer Part Number
STM32F372VBT6
Description
ARM Microcontrollers - MCU 32-Bit ARM Cortex M4 72MHz 128kB MCU FPU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F372VBT6

Product Category
ARM Microcontrollers - MCU
Rohs
yes
Core
ARM Cortex M4F
Processor Series
STM32F372xx
Data Bus Width
32 bit
Maximum Clock Frequency
72 MHz
Program Memory Size
128 KB
Data Ram Size
24 KB
On-chip Adc
Yes
Operating Supply Voltage
2.4 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
A/d Bit Size
16 bit
A/d Channels Available
1
Interface Type
CAN, I2C, SPI, USART, USB
Length
14 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
84
Number Of Timers
2
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.4 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32F372VBT6
Manufacturer:
STMicroelectronics
Quantity:
500
Part Number:
STM32F372VBT6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM32F372VBT6
Manufacturer:
ST
0
Electrical characteristics
Table 63.
1. Guaranteed by design, not tested in production.
2. Quiescent mode refers to the state of the DAC keeping a steady value on the output, so no dynamic consumption is
3. Guaranteed by characterization, not tested in production.
Figure 31. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
100/128
Offset
Gain
error
t
Update
rate
t
PSRR+
SETTLING
WAKEUP
Symbol
involved.
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
(3)
(3)
(3)
(1)
(3)
(3)
Offset error
(difference between
measured value at Code
(0x800) and the ideal value =
V
Gain error
Settling time (full scale: for a
10-bit input code transition
between the lowest and the
highest input codes when
DAC_OUT reaches final
value ±1LSB
Max frequency for a correct
DAC_OUT change when
small variation in the input
code (from code i to i+1LSB)
Wakeup time from off state
(Setting the ENx bit in the
DAC Control register)
Power supply rejection ratio
(to V
measurement
DAC characteristics (continued)
REF+
DDA
/2)
) (static DC
Parameter
Buffered/Non-buffered DAC
12-bit
digital to
analog
converter
Min
-
-
-
-
-
-
-
-
Doc ID 022691 Rev 3
Buffer(1)
Typ
-67
6.5
3
-
-
-
-
-
Max
±0.5
±10
±12
-40
DACx_OUT
±3
10
4
1
MS/s C
Unit
LSB
LSB
mV
dB No R
µs C
µs
%
C
R
Given for the DAC in 10-bit at V
= 3.6 V
Given for the DAC in 12-bit at V
= 3.6 V
Given for the DAC in 12bit
configuration
C
input code between lowest and
highest possible ones.
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
 50 pF, R
 50 pF, R
 50 pF, R
, C
LOAD
Comments
ai17157
LOAD
LOAD
LOAD
= 50 pF
 5 k
 5 k
 5 k
STM32F37x
REF+
REF+

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