MCF52236AF50A Freescale Semiconductor, MCF52236AF50A Datasheet - Page 27

• Manufacturer Part Number: MCF52236AF50A
• Description: 32-bit Microcontrollers - MCU KIRIN2E EPP - REVA
• Manufacturer: Freescale Semiconductor

Specifications of MCF52236AF50A

• Core: ColdFire V2
• Processor Series: MCF52235
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: 0 C to + 70 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 8
• Interface Type: I2C, QSPI, UART
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Number Of Programmable I/os: 56
• Number Of Timers: 4
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

1.16
Table 17
1.17
The pins described in
capability. All power supply pins must have adequate bypass capacitance for high-frequency noise suppression.
Some of the V
Pay particular attention to those pins which show only capacitor connections. Do not connect power supply voltage directly to
these pins.
Freescale Semiconductor
PLL Analog Supply
Positive Supply
contains a list of EzPort external signals
Signal Name
EzPort Signal Descriptions
Power and Ground Pins
Ground
DD
EzPort Serial Data Out
EzPort Serial Data In
and V
EzPort Chip Select
Signal Name
EzPort Clock
Table 18
SS
pins on the device are only to be used for noise bypass.
Abbreviation
provide system power and ground to the chip. Multiple pins are provided for adequate current
VDDPLL,
VSSPLL
MCF52235 ColdFire Microcontroller Data Sheet, Rev. 10
VDD
VSS
Table 17. EzPort Signal Descriptions
Table 18. Power and Ground Pins
Abbreviation
Dedicated power supply signals to isolate the sensitive PLL analog
circuitry from the normal levels of noise present on the digital power
supply.
These pins supply positive power to the core logic.
This pin is the negative supply (ground) to the chip.
EZPCK
EZPCS
EZPD
EZPQ
Shift clock for EzPort transfers
Chip select for signalling the start and end
of serial transfers
EZPD is sampled on the rising edge of
EZPCK
EZPQ transitions on the falling edge of
EZPCK
Function
Function
Figure 5
shows a typical connection diagram.
MCF52235 Family Configurations
I/O
O
I
I
I
I/O
—
I
I
27