DS1085LZ-25B2 Maxim Integrated, DS1085LZ-25B2 Datasheet - Page 5

• Manufacturer Part Number: DS1085LZ-25B2
• Description: Programmable Oscillators
• Manufacturer: Maxim Integrated
• Series: DS1085r

Specifications of DS1085LZ-25B2

• Part # Aliases: 90-1085Z-L2B

REGISTER FUNCTIONS
The user-programmable registers can be used to determine the mode of operation (MUX), operating
frequency (DAC, OFFSET, DIV), and bus settings (ADDR). The functions of the registers are described
in this section, but the details of how these registers are programmed can be found in a later section. The
register settings are nonvolatile, with the values being stored automatically or as required in EEPROM
when the registers are programmed through the SDA and SCL pins.
DAC WORD
MSB
d9
X = Don’t care.
The DAC word (d0–d9) controls the frequency of the master oscillator. The resolution of this register
depends on the step size of the device. The absolute frequency of the device also depends on the value of
the OFFSET register (see Tables 5 and 6).
Table 5. DEVICE DEFAULT SETTINGS
For any given value of OFFSET the master oscillator frequency can be derived as follows:
where: Min frequency is the lowest frequency shown in Table 6 for the corresponding offset.
OFFSET BYTE
MSB
X
X = Don’t care.
The OFFSET byte (O0–O4) determines the range of frequencies that can be obtained within the absolute
minimum and maximum range of the oscillator. Correct operation of the device is not guaranteed for
values of OFFSET not shown in Table 6.
Frequency
48.58MHz
d8
DAC is the value of the DAC register (0–1023).
Step size is the step size of the device (5kHz, 12.5kHz, or 25kHz).
OS is the decimal, integer value of the 5 MSBs of the RANGE register.
DS1085LZ-5
d7
X
(Address 0Eh)
(Address 08h)
First Data Byte
DAC
500
d6
d5
X
Offset
OS
Frequency = Min Frequency + DAC x Step Size
d4
Frequency
52.3MHz
d3
O4
DS1085LZ-12
LSB
d2
5 of 21
MSB
DAC
d1
O3
600
d0
Offset
OS
X
O2
Second Data Byte
Frequency
X
50.9MHz
X
DS1085LZ-25
O1
X
DAC
500
X
LSB
O0
Offset
OS
LSB
X