DS1085LZ-25B2 Maxim Integrated, DS1085LZ-25B2 Datasheet - Page 10

• Manufacturer Part Number: DS1085LZ-25B2
• Description: Programmable Oscillators
• Manufacturer: Maxim Integrated
• Series: DS1085r

Specifications of DS1085LZ-25B2

• Part # Aliases: 90-1085Z-L2B

COMMAND SET
Data and control information is read from and written to the DS1085L in the format shown in Figure 3.
To write to the DS1085L, the master issues the slave address of the DS1085L and the R/
After receiving an acknowledge, the bus master provides a command protocol. After receiving this
protocol, the DS1085L issues an acknowledge, and then the master can send data to the DS1085L. If the
DS1085L is to be read, the master must send the command protocol as before, and then issue a repeat
START condition and then the control byte again, this time with the R/
the data from the DS1085L. The command set for the DS1085L is listed as follows:
Access DAC [08h]
If R/
values are written into the DAC register. If R/
DAC register. This is a 2-byte transfer, the first byte contains the eight MSBs, and the second byte
contains the two LSBs in the most significant positions of the data byte. The remaining six bits are
ignored and can be written with any value (if read, these bits are 0).
Access OFFSET [0Eh]
If R/
value is written into the OFFSET register. If R/
OFFSET register. This is a single-byte transfer of which only the five LSBs (last five bits) are used. The
remaining three bits can be written with any value to complete the data byte (if read, these bits are 1).
Access DIV [01h]
If R/
values are written into the DIV register. If R/
DIV register. This register has a 10-bit value. The upper eight bits are sent first, followed by a second
byte that contains the two LSBs of the register value in the most significant positions of the data byte.
The remaining six bits are ignored and can be set to any value (if read, these bits are 0).
Access MUX [02h]
If R/
values are written into the MUX register. If R/
MUX register. This register has a 10-bit value. The upper eight bits are sent first, followed by a second
byte that contains the two LSBs of the register value in the most significant positions of the data byte.
The remaining six bits are ignored and can be set to any value (if read, these bits are 0).
Access ADDR [0Dh]
If R/
value is written into the ADDR register. If R/
ADDR register. This is a single-byte transfer. This register has a 5-bit value, the first three bits of a write
can be any value followed by the five active bits (if read, the first three bits are 0).
W
W
W
W
W
is 0, this command writes to the MUX register. After issuing this command, the next data byte
is 0, this command writes to the OFFSET register. After issuing this command, the next data byte
is 0, this command writes to the ADDR register. After issuing this command, the next data byte
is 0, this command writes to the DAC register. After issuing this command, the next data byte
is 0, this command writes to the DIV register. After issuing this command, the next data byte
W
W
W
W
W
is 1, the next data bytes read are the values stored in the
is 1, the next data bytes read are the values stored in the
is 1, the next data bytes read are the values stored in the
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is 1, the next data byte read is the value stored in the
is 1, the next data byte read is the value stored in the
W
bit set to 1 to allow reading of
W
bit is set to 0.