S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 540

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S912XEP768J5MAGR

Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEP768J5MAGR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEP768J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
14.3.2.8
Read or write: Anytime
All bits reset to zero.
540
Module Base + 0x0008
Module Base + 0x0009
7, 5, 3, 1
6, 4, 2, 0
OM[7:0]
OL[7:0]
Reset
Reset
Field
W
W
R
R
OM7
OM3
OMx — Output Mode
OLx — Output Level
These eight pairs of control bits are encoded to specify the output action to be taken as a result of a successful
OCx compare. When either OMx or OLx is one, the pin associated with OCx becomes an output tied to OCx.
See
Timer Control Register 1/Timer Control Register 2 (TCTL1/TCTL2)
0
0
7
7
To enable output action by OMx and OLx bits on timer port, the
corresponding bit in OC7M should be cleared. The settings for these bits can
be seen in
Table
14-10.
OMx
OL7
OL3
Table 14-11
0
0
6
6
0
0
1
1
Figure 14-11. Timer Control Register 1 (TCTL1)
Figure 14-12. Timer Control Register 2 (TCTL2)
Table 14-9. TCTL1/TCTL2 Field Descriptions
Table 14-10. Compare Result Output Action
MC9S12XE-Family Reference Manual Rev. 1.25
OM6
OM2
OLx
0
1
0
1
0
0
5
5
No output compare
action on the timer output signal
Toggle OCx output line
Clear OCx output line to zero
Set OCx output line to one
OL6
OL2
NOTE
0
0
4
4
Description
OM5
OM1
Action
0
0
3
3
OL5
OL1
0
0
2
2
Freescale Semiconductor
OM4
OM0
0
0
1
1
OL4
OL0
0
0
0
0

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