MAX1363EUB Maxim Integrated, MAX1363EUB Datasheet - Page 16

• Manufacturer Part Number: MAX1363EUB
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1363EUB

• Number Of Channels: 4/2
• Architecture: SAR
• Conversion Rate: 133 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Differential
• Snr: Yes
• Interface Type: I2C, Serial
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: uMAX
• Maximum Power Dissipation: 444.4 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 4.096 V

4-Channel, 12-Bit System Monitors with Programmable
Trip Window and SMBus Alert Response
Table 4. Setup-Byte Format*
* Power-on defaults: 0x82
Table 5. Channel Selection in Single-
Ended Mode (SE/DIF = 1)
Table 6. Channel Selection in Differential
Mode (SE/DIF = 0)
16
7 (MSB)
CS1
CS1
BIT
0
0
1
1
0
0
1
1
6
5
4
3
2
1
0
______________________________________________________________________________________
INT REF Power
REF/AIN SEL1
REF/AIN SEL0
INT/EXT Clock
CS0
CS0
Monitor Setup
0
1
0
1
0
1
0
1
UNI/BIP
NAME
Setup
Down
Reset
CH0
CH0
+
+
-
Setup byte always starts with 1.
When [0,0], REF/AIN3 = AIN3, REF = V
When [0,1], REF/AIN3 = REF, apply external reference to REF.
When [1,0], REF/AIN3 = AIN3, REF = internal reference.
When [1,1], REF/AIN3 = REF, REF = internal reference.
(Table 3)
1 = internal reference always powered up.
0 = internal reference always powered down.
(Table 3)
0 = internal clock.
1 = external clock (MAX1363/MAX1364 use the SCL clock for conversions).
0 = unipolar.
1 = bipolar.
Selects unipolar or bipolar conversion mode. In unipolar mode, analog signal in 0 to V
be converted. In differential bipolar mode, input signal can range from -V
single-ended mode is chosen, the SE/DIF bit of configuration byte overrides UNI/BIP, and
conversions are performed in unipolar mode.
1 = no action.
0 = resets INT and configuration register. Setup register and channel trip thresholds are unaffected.
0 = no action.
1 = extends writing up to 13 bytes (104 bits) of alarm reset mask. Scans speed selection and alarm
thresholds. See the Configuring Monitor Mode section.
CH1
CH1
+
+
-
CH2
CH2
+
+
-
CH3
CH3
+
+
-
cycles begin with the bus master issuing a START
condition followed by 7 address bits and a read bit
(R/W = 1). After successfully receiving the address byte,
the MAX1363/MAX1364 (slave) issue an ACK. The master
then reads from the slave. (See Figures 10–13.)
The result is transmitted in 2 bytes. The 1st byte con-
sists of a leading 1 followed by a 2-bit binary channel
address tag, a 12/10 bit flag (1 for the MAX1363/
MAX1364), the first 4 bits of the data result, and the
expected ACK from the master. The 2nd byte contains
D7–D0. To read the next conversion result, issue an
ACK. To stop reading, issue a NACK.
Table 7. SE/DIF and UNI/BIP Table
DD.
SE/DIF
DESCRIPTION
0
0
1
1
UNI/BIP
0
1
0
1
Differential inputs, unipolar
Differential inputs, bipolar
Single-ended inputs, unipolar
Single-ended inputs, unipolar
REF
/ 2 to +V
MODE
REF
REF
/ 2. When
range can