MAX1166BEUP-T Maxim Integrated, MAX1166BEUP-T Datasheet - Page 9

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MAX1166BEUP-T

Manufacturer Part Number
MAX1166BEUP-T
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1166BEUP-T

Number Of Channels
1
Architecture
SAR
Conversion Rate
165 KSPs
Resolution
16 bit
Input Type
Single-Ended
Snr
90 dB
Interface Type
Parallel
Operating Supply Voltage
2.7 V to 5.25 V, 4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-20
Maximum Power Dissipation
879 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.096 V
In track mode, the analog signal is acquired on the inter-
nal hold capacitor. In hold mode, the T/H switches open
and the capacitive DAC samples the analog input.
During the acquisition, the analog input (AIN) charges
capacitor C
falling edge of CS. At this instant, the T/H switches
open. The retained charge on C
ple of the input.
In hold mode, the capacitive DAC adjusts during the
remainder of the conversion time to restore node ZERO
to zero within the limits of 16-bit resolution. Force CS low
to put valid data on the bus at the end of the conversion.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens and more time must be
allowed between conversions. The acquisition time
(t
the signal. Use the following formula to calculate acqui-
sition time:
where R
impedance, and t
source impedance less than 1kΩ does not significantly
affect the ADC’s performance.
To improve the input signal bandwidth under AC condi-
tions, drive AIN with a wideband buffer (>4MHz) that
can drive the ADC’s input capacitance and settle
quickly.
Figure 3. Typical Application Circuit for the MAX1166
ACQ
Low-Power, 16-Bit Analog-to-Digital Converter
) is the maximum time the device takes to acquire
ANALOG INPUT
IN
LOW
BYTE
DAC
= 800Ω, R
HIGH
BYTE
t
ACQ
. The acquisition ends on the second
0.1µF
_______________________________________________________________________________________
= 11 (R
+5V ANALOG
ACQ
AIN
R/C
CS
HBEN
S
AV
MAX1166
DD
is never less than 1.1µs. A
AGND DGND
= the input signal’s source
S
+ R
+5V DIGITAL
DV
Track and Hold (T/H)
DD
D8–D15
REFADJ
D0–D7
IN
DAC
EOC
REF
)
OR
0.1µF
µP DATA
BUS
0.1µF
35pF
represents a sam-
4.7µF
Select standby mode or shutdown mode with the R/C
bit during the second falling edge of CS (see the
Selecting Standby or Shutdown Mode section). The
MAX1165/MAX1166 automatically enter either standby
mode (reference and buffer on) or shutdown (reference
and buffer off) after each conversion depending on the
status of R/C during the second falling edge of CS.
The MAX1165/MAX1166 generate an internal conver-
sion clock. This frees the microprocessor from the bur-
den of running the SAR conversion clock. Total
conversion time after entering hold mode (second
falling edge of CS) to end of conversion (EOC) falling is
4.7µs (max).
CS and R/C control acquisition and conversion in the
MAX1165/MAX1166 (Figure 2). The first falling edge of
CS powers up the device and puts it in acquire mode if
R/C is low. The convert start is ignored if R/C is high.
The MAX1165/MAX1166 need at least 10ms
(C
ence to wake up and settle before starting the conver-
sion if powering up from shutdown. The ADC can wake
up, from shutdown, to an unknown state. Put the ADC
in a known state by completing one “dummy” conver-
sion. The MAX1165/MAX1166 are in a known state,
ready for actual data acquisition, after the completion
of the dummy conversion. A dummy conversion con-
sists of one full conversion cycle.
The MAX1165 provides an alternative reset function to
reset the device (see the RESET section).
Figure 4. Equivalent Input Circuit
with Parallel Interface
C
AIN
SWITCH
REFADJ
3pF
= 0.1µF, C
TRACK
HOLD
AGND
Applications Information
REF
CAPACITIVE DAC
C
REF
DAC
HOLD
= 32pF
= 4.7µF) for the internal refer-
Starting a Conversion
Power-Down Modes
TRACK
R
800Ω
IN
ZERO
Internal Clock
AUTOZERO
RAIL
9

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