MAX1362EUB-T Maxim Integrated, MAX1362EUB-T Datasheet - Page 13

• Manufacturer Part Number: MAX1362EUB-T
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1362EUB-T

• Number Of Channels: 4/2
• Architecture: SAR
• Conversion Rate: 150 KSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Differential
• Snr: Yes
• Interface Type: I2C, Serial
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: uMAX
• Maximum Power Dissipation: 689.7 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 4.096 V

To generate a not-acknowledge condition, the receiver
allows SDA to be pulled high before the rising edge of
the acknowledge-related clock pulse, and leaves SDA
high during the high period of the clock pulse.
Monitoring the acknowledge bits allows for detection of
unsuccessful data transfers. An unsuccessful data
transfer happens if a receiving device is busy or if a
system fault has occurred. In the event of an unsuc-
cessful data transfer, the bus master reattempts com-
munication at a later time.
The MAX1361/MAX1362 have a 7-bit I
address. The slave address is selected using A0. The
MAX1361/MAX1362 (EUB and MEUB) have 2 base
address options, allowing up to 4 devices concurrently
per I
Figure 6. MAX1361/MAX1362 Slave Address Byte
Table 1. I
Figure 7. F/S-Mode to HS-Mode Transfer
4-Channel, 10-Bit, System Monitor with Programmable
2
A0 STATE
C bus (see Table 1).
High
High
Low
Low
2
SDA
SCL
C Slave Selection Table
S
SDA
SCL
______________________________________________________________________________________
S
0
SUFFIX
MEUB
MEUB
EUB
EUB
0
1
0
Trip Window and SMBus Alert Response
1
2
0
Slave Address
HS-MODE MASTER CODE
1
ADDRESS
0110100
0110101
0110110
0110111
3
0
SLAVE ADDRESS
2
C slave
F/S MODE
0
1
4
1
X
5
The MAX1361/MAX1362 continuously wait for a START
condition followed by its slave address. When the device
recognizes its slave address, it is ready to accept or
send data depending on the R/W bit (Figure 6).
At power-up, the MAX1361/MAX1362 bus timing is set
for fast mode (F/S mode, up to 400kHz I
limits the conversion rate to approximately 22ksps.
Switch to high-speed mode (HS mode, up to 1.7MHz
I
The MAX1361/MAX1362 convert up to 150ksps in moni-
tor mode, regardless of I
are unread, I
monitor mode.
Select HS mode by addressing all devices on the bus
with the HS-mode master code 0000 1XXX (X = don’t
care). After successfully receiving the HS-mode master
code, the MAX1361/MAX1362 issue a NACK, allowing
SDA to be pulled high for one clock cycle (Figure 7).
After the NACK, the MAX1361/MAX1362 operate in HS
mode. Send a repeated START (Sr) followed by a slave
address to initiate HS-mode communication. If the mas-
ter generates a STOP condition the MAX1361/MAX1362
return to F/S mode. Use a repeated START condition
(Sr) in place of a STOP condition to leave the bus active
and the mode unchanged.
2
C clock) to achieve conversion rates up to 94.4ksps.
0
X
6
0
X
7
2
C bandwidth limitations do not apply in
R/W
NACK
8
2
C mode. If conversion results
ACK
Sr
9
HS MODE
2
C clock), which
HS I
2
C Mode
13