dsPIC33FJ32GP104-I/PT Microchip Technology, dsPIC33FJ32GP104-I/PT Datasheet - Page 47

• Manufacturer Part Number: dsPIC33FJ32GP104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

The SAC and SAC.R instructions store either a
truncated (SAC), or rounded (SAC.R) version of the
contents of the target accumulator to data memory via
the
Section 3.6.3.2 “Data Space Write
the MAC class of instructions, the accumulator write-
back operation functions in the same manner,
addressing combined MCU (X and Y) data space
though the X bus. For this class of instructions, the data
is always subject to rounding.
3.6.3.2
In addition to adder/subtracter saturation, writes to data
space can also be saturated, but without affecting the
contents of the source accumulator. The data space
write
1.15 fractional value from the round logic block as its
input, together with overflow status from the original
source (accumulator) and the 16-bit round adder.
These inputs are combined and used to select the
appropriate 1.15 fractional value as output to write to
data space memory.
If the SATDW bit in the CORCON register is set, data
(after rounding or truncation) is tested for overflow and
adjusted accordingly:
• For input data greater than 0x007FFF, data
• For input data less than 0xFF8000, data written to
 2011-2012 Microchip Technology Inc.
written to memory is forced to the maximum
positive 1.15 value, 0x7FFF.
memory is forced to the maximum negative
1.15 value, 0x8000.
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
X
saturation
bus,
Data Space Write Saturation
subject
logic
to
block
data
accepts
Saturation”). For
saturation
a
16-bit,
(see
The MSb of the source (bit 39) is used to determine the
sign of the operand being tested.
If the SATDW bit in the CORCON register is not set, the
input data is always passed through unmodified under
all conditions.
3.6.4
The barrel shifter can perform up to 16-bit arithmetic or
logic right shifts, or up to 16-bit left shifts, in a single
cycle. The source can be either of the two DSP
accumulators or the X bus (to support multi-bit shifts of
register or memory data).
The shifter requires a signed binary value to determine
both the magnitude (number of bits) and direction of the
shift operation. A positive value shifts the operand right.
A negative value shifts the operand left. A value of ‘0’
does not modify the operand.
The barrel shifter is 40 bits wide, thereby obtaining a
40-bit result for DSP shift operations and a 16-bit result
for MCU shift operations. Data from the X bus is
presented to the barrel shifter between Bit Positions 16
and 31 for right shifts, and between Bit Positions 0 and
16 for left shifts.
BARREL SHIFTER
DS70652E-page 47