LCMXO2280E-4BN256C Lattice, LCMXO2280E-4BN256C Datasheet - Page 25

• Manufacturer Part Number: LCMXO2280E-4BN256C
• Description: CPLD - Complex Programmable Logic Devices 2280 LUTs 211 I/O 1.2V -4 SPD
• Manufacturer: Lattice

Specifications of LCMXO2280E-4BN256C

• Rohs: yes
• Memory Type: SRAM
• Number Of Macrocells: 1140
• Delay Time: 4.4 ns
• Number Of Programmable I/os: 211
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Package / Case: CABGA
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 595
• Supply Current: 20 mA
• Supply Voltage - Max: 1.26 V
• Supply Voltage - Min: 1.14 V

4.4 MachXO2 Product Family THB: Biased HAST Data
Highly Accelerated Stress Test (HAST) testing uses both pressure and temperature to accelerate penetration of
moisture into the package and to the die surface. The Biased HAST test is used to accelerate threshold shifts in
the MOS device associated with moisture diffusion into the gate oxide region as well as electrochemical
corrosion mechanisms within the device package. Consistent with JEDEC JESD22-A110B “Highly-Accelerated
Temperature and Humidity Stress Test (HAST)”, the biased HAST conditions are either 96 hours exposure at
130°C and 85% relative humidity (Condition A), or 264 hours exposure at 110°C and 85% relative humidity
(Condition B). Prior to Biased HAST testing, all devices are subjected to Surface Mount Preconditioning.
MSL3 Packages: TQFP, csBGA, QFN
Stress Conditions: Vcc= 1.26V/ V
Stress Duration: 264 Hrs (Condition B)
Method: Lattice Procedure # 70-101571 and JESD22-A110B
Table 4.4.1: Biased HAST Data
* 1 unit failed for “package damage “due to handling damage.
A
B
INDEX Return
Sample size reduced by one.
FAR #1398 Root cause FA in process.
FAR #1399 Root cause FA in process.
Product Name
LCMXO2-1200
LCMXO2-1200
LCMXO2-1200
LCMXO2-4000
LCMXO2-4000
LCMXO2-4000
LCMXO2-1200
LCMXO2-1200
LCMXO2-1200
LCMXO2-7000
LCMXO2-7000
LCMXO2-7000
LCMXO2-256
LCMXO2-256
LCMXO2-256
132csBGA
132csBGA
132csBGA
184csBGA
184csBGA
184csBGA
484fpBGA
484fpBGA
484fpBGA
144TQFP
144TQFP
144TQFP
Package
32QFN
32QFN
32QFN
CCIO
Assembly
ASEKH
ASEKH
ASEKH
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
ASEM
Site
= 3.3V, 110°C and 85% RH (Condition B)
Lot Number
Lot #1
Lot #2
Lot #3
Lot #1
Lot #2
Lot #3
Lot #1
Lot #2
Lot #3
Lot #1
Lot #2
Lot #3
Lot #1
Lot #2
Lot #3
25
MachXO2 Cumulative BHAST failure Rate = 2 / 1064
Quantity
85
85
81*
82
82
45
45
77
85
77
45
45
77
76
76
A
B
Lattice Semiconductor Corporation Doc. #25-106923 Rev. F
# of Fails
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
Temperature
Stress
110°C
110°C
110°C
110°C
110°C
110°C
110°C
110°C
110°C
110°C
110°C
110°C
110°C
110°C
110°C
Duration
264 Hrs
264 Hrs
264 Hrs
264 Hrs
264 Hrs
264 Hrs
264 Hrs
264 Hrs
264 Hrs
264 Hrs
264 Hrs
264 Hrs
Stress
96 Hrs
96 Hrs
96 Hrs