MAX1464CAI+T Maxim Integrated, MAX1464CAI+T Datasheet - Page 32

• Manufacturer Part Number: MAX1464CAI+T
• Description: Digital Signal Processors & Controllers - DSP, DSC Low-Power Low-Noise Multichannel Sensor Signal Processor
• Manufacturer: Maxim Integrated
• Series: MAX1464r

Specifications of MAX1464CAI+T

• Data Bus Width: 16 bit
• Program Memory Size: 4 KB, 128 B
• Maximum Clock Frequency: 5.3 MHz
• Number Of Programmable I/os: 2
• Operating Supply Voltage: 5 V
• Interface Type: SPI
• On-chip Adc: Yes
• Processor Series: MAX1464
• Product: DSPs
• Program Memory Type: Flash

Low-Power, Low-Noise Multichannel
Sensor Signal Processor
Table 11. ADC_Config_2B (Address = 06h)
Table 12. ADC_Config_TA (Address = 08h)
Table 13. ADC_Config_TB (Address = 09h)
Table 14. Programmable-Gain Amplifier
(PGAn[4:0], Where n = 1, 2, or T)
32
15–11
BITS
BITS
15–7
10–8
15–7
BIT
6–4
3–2
1–0
6–4
3–0
6–4
2–0
______________________________________________________________________________________
7
3
PGAn[4:0]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01010
01100
01110
10000
10100
11000
11100
11110
BIAS2[2:0]
PGAT[4:0]
BIAST[2:0]
REF2[1:0]
CLKT[2:0]
REST[2:0]
COT[2:0]
COT[3]
NAME
NAME
NAME
—
—
—
—
—
Unused.
ADC bias setting to use during conversion of channel 2. BIAS2[2] = MSB.
Unused.
Reference select for conversion on channel 2. REF2[2] = MSB.
Programmable gain to use during conversion of temperature sensor. PGAT[4] = MSB.
ADC clock setting to use during conversion of the temperature sensor. CLKT[2] = MSB.
Unused.
ADC resolution setting to use during conversion of the temperature sensor. REST[2] = MSB.
Coarse-offset DAC sign bit.
Coarse-offset DAC setting to use during conversion of the temperature sensor. COT[2] = MSB.
Unused.
ADC bias setting to use during conversion of the temperature sensor. BIAST[2] = MSB.
Unused.
GAIN (V/V)
0.99
15.5
107
123
153
183
214
244
7.7
23
31
39
46
54
62
77
92
Table 15. ADC Clock (CLKn[2:0],
Where n = 1, 2, or T; f
DESCRIPTION
DESCRIPTION
DESCRIPTION
CLKn[2:0]
000
001
010
011
100
101
110
111
DIVISOR n
128
256
512
16
32
64
4
8
CLK
= 4MHz)
f
ADC
15.625k
7.8125k
31.25k
62.5 k
500k
250k
125k
1M
(Hz)