MC56F8035VLDR Freescale Semiconductor, MC56F8035VLDR Datasheet - Page 102

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MC56F8035VLDR

Manufacturer Part Number
MC56F8035VLDR
Description
Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC56F8035VLDR

Rohs
yes
Core
56800E
Data Bus Width
16 bit
Program Memory Size
64 KB
Data Ram Size
8 KB
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Device Million Instructions Per Second
32 MIPs
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Package / Case
LQFP-44
Mounting Style
SMD/SMT

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6.3.20.3
This bit field is reserved. Each bit must be set to 0.
6.3.21
The internal integration of peripherals provides input signal source selection for peripherals where an input
signal to a peripheral can be fed from one of several sources. These registers are organized by peripheral
type and provide a selection list for every peripheral input signal that has more than one alternative source
to indicate which source is selected.
If one of the alternative sources is GPIO, the setting in these registers must be made consistently with the
settings in the GPSn and GPIOx_PEREN registers. Specifically, when an IPSn field is configured to select
an I/O pin as the source, then GPSn register settings must configure only one I/O pin to feed this peripheral
input function. Also, the GPIOx_PEREN bit for that I/O pin must be set to 1 to enable peripheral control
of the I/O.
IPSn settings should not be altered while an affected peripheral is in an enabled (operational)
configuration. See the 56F802x and 56F803x Peripheral Reference Manual for details.
102
0 = XTAL - External Crystal Oscillator Output (default)
1 = CLKIN - External Clock Input
FAULT2
PWM
Internal Peripheral Source Select Register 0 for Pulse Width
Modulator (SIM_IPS0)
Figure 6-24 Overall Control of Signal Source using SIM_IPSn Control
Reserved—Bits 11–0
SIM_IPS0
Register
0
1
Comparator A
Output (Internal)
Timer A3
56F8035/56F8025 Data Sheet, Rev. 6
PWM5
SIM_GPSA0
Register
10
00
01
GPIOA5
GPIOA5_PEREN
Register
0
1
Freescale Semiconductor
GPIOA5 pin

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