dsPIC33FJ32GP102-I/SO Microchip Technology, dsPIC33FJ32GP102-I/SO Datasheet - Page 72

• Manufacturer Part Number: dsPIC33FJ32GP102-I/SO
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP102-I/SO

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: QFN-28
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

TABLE 4-37:
TABLE 4-38:
TABLE 4-39:
RCON
OSCCON
CLKDIV
OSCTUN
Legend:
Note
NVMCON
NVMKEY
Legend:
Note
PMD1
PMD2
PMD3
PMD4
Legend:
Note
File Name
File Name
File Name
1:
2:
1:
1:
2:
Addr
0740
0742
0744
0748
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
RCON register Reset values are dependent on the type of Reset.
OSCCON register Reset values are dependent on the FOSC Configuration bits and by type of Reset.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Reset value shown is for POR only. Value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
This bit is available in dsPIC33FJXXMC10X devices only.
This bit is available in dsPIC33FJ32(GP/MC)10X devices only.
Addr
Addr
0770
0772
0774
0776
0760
0766
SYSTEM CONTROL REGISTER MAP
TRAPR
NVM REGISTER MAP
PMD REGISTER MAP
Bit 15
T5MD
ROI
Bit 15
Bit 15
—
—
WR
—
—
—
—
(2)
IOPUWR
T4MD
Bit 14
Bit 14
WREN
Bit 14
—
—
—
—
—
(2)
COSC<2:0>
DOZE<2:0>
Bit 13
T3MD
Bit 13
WRERR
—
—
—
—
—
Bit 13
—
Bit 12
T2MD
Bit 12
—
—
—
—
—
Bit 12
—
—
DOZEN
Bit 11
T1MD
Bit 11
—
—
—
—
—
—
Bit 11
—
—
CMPMD
IC3MD
Bit 10
Bit 10
—
—
—
—
Bit 10
—
—
FRCDIV<2:0>
PWM1MD
NOSC<2:0>
RTCCMD
IC2MD
Bit 9
Bit 9
CM
—
—
Bit 9
—
—
(1)
VREGS
Bit 8
IC1MD
—
Bit 8
—
—
—
Bit 8
—
—
CLKLOCK IOLOCK
EXTR
Bit 7
I2C1MD
—
—
Bit 7
Bit 7
—
—
—
—
SWR
Bit 6
—
—
ERASE
Bit 6
Bit 6
—
—
—
—
SWDTEN
LOCK
Bit 5
—
U1MD
Bit 5
Bit 5
—
—
—
—
WDTO
Bit 4
—
—
Bit 4
NVMKEY<7:0>
Bit 4
—
—
—
—
—
SLEEP
Bit 3
CF
—
SPI1MD
Bit 3
Bit 3
TUN<5:0>
—
—
—
IDLE
Bit 2
CTMUMD
—
—
Bit 2
Bit 2
NVMOP<3:0>
—
—
—
LPOSCEN OSWEN
Bit 1
BOR
OC2MD OC1MD
—
Bit 1
Bit 1
—
—
—
AD1MD
Bit 0
POR
Bit 0
Bit 0
—
—
—
Resets
Resets
xxxx
0300
3040
0000
Resets
0000
0000
0000
0000
0000
0000
All
All
All
(1)
(2)
(1)