dsPIC33FJ32GP102-I/SO Microchip Technology, dsPIC33FJ32GP102-I/SO Datasheet - Page 211

• Manufacturer Part Number: dsPIC33FJ32GP102-I/SO
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP102-I/SO

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: QFN-28
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

18.3
REGISTER 18-1:
 2011-2012 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
Note 1:
UARTEN
R/W-0, HC
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
R/W-0
WAKE
2:
UART Control Registers
(1)
Refer to Section 17. “UART” (DS70188) in the “dsPIC33F/PIC24H Family Reference Manual” for
information on enabling the UART module for receive or transmit operation.
This feature is available for 16x BRG mode (BRGH = 0) only.
UARTEN: UARTx Enable bit
1 = UARTx is enabled; all UARTx pins are controlled by UARTx as defined by the UEN<1:0> bits
0 = UARTx is disabled; all UARTx pins are controlled by port latches; UARTx power consumption is
Unimplemented: Read as ‘0’
USIDL: UARTx Stop in Idle Mode bit
1 = Discontinues module operation when device enters Idle mode
0 = Continues module operation in Idle mode
IREN: IrDA
1 = IrDA encoder and decoder are enabled
0 = IrDA encoder and decoder are disabled
RTSMD: UARTx Mode Selection for UxRTS Pin bit
1 = UxRTS pin in Simplex mode
0 = UxRTS pin in Flow Control mode
Unimplemented: Read as ‘0’
UEN<1:0>: UARTx Pin Enable bits
11 = UxTX, UxRX and BCLK pins are enabled and used; UxCTS pin is controlled by port latches
10 = UxTX, UxRX, UxCTS and UxRTS pins are enabled and used
01 = UxTX, UxRX and UxRTS pins are enabled and used; UxCTS pin is controlled by port latches
00 = UxTX and UxRX pins are enabled and used; UxCTS and UxRTS/BCLK pins are controlled by
WAKE: Wake-up on Start bit Detect During Sleep Mode Enable bit
1 = UARTx will continue to sample the UxRX pin; interrupt is generated on falling edge; bit is cleared
0 = No wake-up is enabled
LPBACK: UARTx Loopback Mode Select bit
1 = Enables Loopback mode
0 = Loopback mode is disabled
ABAUD: Auto-Baud Enable bit
1 = Enables baud rate measurement on the next character – requires reception of a Sync field (55h)
0 = Baud rate measurement is disabled or completed
LPBACK
R/W-0
minimal
in hardware on following rising edge
before other data; cleared in hardware upon completion
U-0
—
port latches
UxMODE: UART
®
Encoder and Decoder Enable bit
HC = Hardware Clearable bit
W = Writable bit
‘1’ = Bit is set
R/W-0, HC
ABAUD
USIDL
R/W-0
x
MODE REGISTER
(1)
URXINV
IREN
R/W-0
R/W-0
(2)
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
RTSMD
(2)
R/W-0
BRGH
R/W-0
R/W-0
U-0
—
PDSEL<1:0>
x = Bit is unknown
R/W-0
R/W-0
UEN<1:0>
DS70652E-page 211
STSEL
R/W-0
R/W-0
bit 8
bit 0