PCF2129AT/2,518 NXP Semiconductors, PCF2129AT/2,518 Datasheet - Page 41

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PCF2129AT/2,518

Manufacturer Part Number
PCF2129AT/2,518
Description
Real Time Clock
Manufacturer
NXP Semiconductors
Series
PCF2129r
Datasheet

Specifications of PCF2129AT/2,518

Rohs
yes
Function
Clock, Calendar, Alarm, Watchdog, Timestamp
Rtc Bus Interface
I2C, SPI
Date Format
Binary
Time Format
Binary
Supply Voltage - Max
4.2 V
Supply Voltage - Min
1.2 V
Maximum Operating Temperature
+ 60 C
Minimum Operating Temperature
- 15 C
Mounting Style
SMD/SMT
Package / Case
SOP-20
Battery Backup Switching
Yes
Factory Pack Quantity
2000

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NXP Semiconductors
PCF2129AT
Product data sheet
8.12.4 Alarm interrupts
8.12.5 Timestamp interrupts
8.12.6 Battery switch-over interrupts
8.12.7 Battery low detection interrupts
The interrupt is cleared when the flag WDTF is reset. WDTF is a read only bit and cannot
be cleared by command. Instructions for clearing it can be found in
Generation of interrupts from the alarm function is controlled by the bit AIE (register
Control_2). If AIE is enabled, the INT pin will follow the status of bit AF (register
Control_2). Clearing AF will immediately clear INT. No pulse generation is possible for
alarm interrupts.
Interrupt generation from the timestamp function is controlled using the TSIE bit (register
Control_2). If TSIE is enabled, the INT pin follows the status of the flags TSFx. Clearing
the flags TSFx immediately clears INT. No pulse generation is possible for timestamp
interrupts.
Generation of interrupts from the battery switch-over is controlled by the BIE bit (register
Control_3). If BIE is enabled, the INT pin follows the status of bit BF in register Control_3
(see
battery switch-over interrupts.
Generation of interrupts from the battery low detection is controlled by the BLIE bit
(register Control_3). If BLIE is enabled, the INT pin will follow the status of bit BLF
(register Control_3). The interrupt is cleared when the battery is replaced (BLF is logic 0)
or when bit BLIE is disabled (BLIE is logic 0). BLF is read only and therefore cannot be
cleared by command.
Fig 23. AF timing diagram
Table
Example where only the minute alarm is used and no other interrupts are enabled.
45). Clearing BF immediately clears INT. No pulse generation is possible for
minute counter
All information provided in this document is subject to legal disclaimers.
minute alarm
instruction
Rev. 5 — 12 February 2013
SCL
INT
AF
44
45
45
CLEAR INSTRUCTION
Integrated RTC, TCXO and quartz crystal
8th clock
PCF2129AT
Section
001aaf910
© NXP B.V. 2013. All rights reserved.
8.10.5.
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