83948AYILF IDT, 83948AYILF Datasheet - Page 2

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83948AYILF

Manufacturer Part Number
83948AYILF
Description
Clock Drivers & Distribution
Manufacturer
IDT
Datasheet

Specifications of 83948AYILF

Product Category
Clock Drivers & Distribution
Rohs
yes
Part # Aliases
ICS83948AYILF
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Tables
Table 3A. Clock Select Function Table
IDT™ / ICS™ LVCMOS/LVTTL CLOCK GENERATOR
20, 24, 28, 32
Symbol
C
R
R
C
R
ICS83948I-147
LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
15, 17, 19,
21, 23, 25,
10, 14, 18,
IN
PULLUP
PULLDOWN
PD
OUT
27, 29, 31
22, 26, 30
8, 12, 16,
9, 11, 13,
Number
Control
Input
1
2
3
4
5
6
7
0
1
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Power Dissipation Capacitance
(per output)
Output Impedance
Clock
CLK/nCLK inputs selected
LVCMOS_CLK input selected
LVCMOS_CLK
Q11, Q10, Q9,
Q8, Q7, Q6,
Q5, Q4, Q3,
Q2, Q1, Q0
CLK_SEL
CLK_EN
Name
nCLK
V
GND
CLK
V
OE
DDO
DD
Output
Power
Power
Power
Input
Input
Input
Input
Input
Input
Type
Pulldown
Pullup
Pullup
Pullup
Pullup
Pullup
Test Conditions
Description
Clock select input. When HIGH, selects LVCMOS_CLK input.
When LOW, selects CLK/nCLK inputs. LVCMOS / LVTTL interface levels.
Single-ended clock input. LVCMOS/LVTTL interface levels.
Non-inverting differential clock input.
Inverting differential clock input.
Clock enable pin. LVCMOS/LVTTL interface levels.
Output enable pin. When LOW, outputs are in an High-impedance state.
when HIGH, outputs are active. LVCMOS/LVTTL interface levels.
Power supply pin.
Power supply ground.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
Output supply pins.
2
Minimum
5
ICS83948AYI-147 REV. D NOVEMBER 1, 2012
Typical
51
51
12
4
7
Maximum
12
Units
k
k
pF
pF

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