74FCT388915TDJG IDT, 74FCT388915TDJG Datasheet - Page 2

• Manufacturer Part Number: 74FCT388915TDJG
• Description: Clock Drivers & Distribution
• Manufacturer: IDT

Specifications of 74FCT388915TDJG

• Product Category: Clock Drivers & Distribution
• Rohs: yes
• Part # Aliases: IDT74FCT388915TDJG

PIN CONFIGURATION
PIN DESCRIPTION
IDT74FCT388915T
3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (3-STATE)
FEEDBACK
FREQ_SEL
Pin Name
REF_SEL
SYNC(0)
SYNC(1)
OE/RST
PLL_EN
Q0-Q4
LOCK
Q/2
Q5
2Q
LF
FEEDBACK
FREQ_SEL
REF_SEL
GND(AN)
SYNC(0)
SYNC(1)
V
OE/RST
CC
GND
GND
(AN)
V
Q0
Q5
CC
LF
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Reference clock input
Reference clock input
Chooses reference between SYNC (0) & SYNC (1) (refer to functional block diagram)
Selects between ÷ 1 and ÷ 2 frequency options (refer to functional block diagram)
Feedback input to phase detector
Input for external loop filter connection
Clock output
Inverted clock output
Clock output (2 x Q frequency)
Clock output (Q frequency ÷ 2)
Indicates phase lock has been achieved (HIGH when locked)
Asynchronous reset (active LOW) and output enable (active HIGH). When HIGH, outputs are enabled. When LOW, outputs are in
HIGH impedance.
Disables phase-lock for low frequency testing (refer to functional block diagram)
TOP VIEW
SSOP
22
21
20
19
18
17
16
15
28
27
26
25
24
23
V
Q4
V
GND
PLL_EN
GND
Q1
GND
V
Q2
Q/2
Q3
LOCK
2Q
CC
CC
CC
2
REF_SEL
GND(AN)
FEEDBK
SYNC(0)
SYNC(1)
V
CC
(AN)
LF
Description
5
6
7
8
9
10
11
12
4
13
3
14
2
COMMERCIAL TEMPERATURE RANGE
TOP VIEW
15
PLCC
1
28
16
17
27
18
26
25
24
23
22
21
20
19
Q/2
GND
Q3
V
Q2
GND
LOCK
CC