ISL8225MIRZ-T Intersil, ISL8225MIRZ-T Datasheet - Page 23

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ISL8225MIRZ-T

Manufacturer Part Number
ISL8225MIRZ-T
Description
ISL8225M Series 20 Vin 1.5 Mhz Dual 15 A Single 30 A Step-Down Power Module
Manufacturer
Intersil
Datasheet
Tracking Function
If CLKOUT is less than 800mV, an external soft-start ramp (0.6V)
can be in parallel with the Channel 2 internal soft-start ramp for
tracking applications. Therefore, the Channel 2’s output voltage
can track the output voltage of Channel 1.
The tracking function can be applied to a typical Double Data
Rate
page 13. The output voltage (typical VTT output) of Channel 2
tracks with the input voltage [typical VDDQ*(1+k) from
Channel 1] at the CLKOUT pin. As for the external input signal
and the internal reference signal (ramp and 0.6V), the one with
the lowest voltage is used as the reference for comparing with
the FB signal. In DDR configuration, VTT channel should start up
later, after its internal soft-start ramp, such that VTT tracks the
voltage on the CLKOUT pin derived from VDDQ. This configuration
can be achieved by adding more filtering at EN/FF1 than at
EN/FF2.
The resistor divider ratio (k) of R7/R8 in Figure 20 is calculated
as shown in Equation 7:
Mode Programming
ISL8225M can be programmed for dual-output, paralleled
single-output or mixed outputs (Channel 1 in parallel and
Channel 2 in dual-output). With multiple ISL8225Ms, up to 6
modules using its internal cascaded clock signal control, the
modules can supply large current up to 180A. For complete
operation, please refer to Table 3 on page 18. Commonly used
settings are listed in Table 5.
When the module is in the dual-output condition, depending
upon the voltage level at CLKOUT (which is set by the VCC resistor
divider output), ISL8225M operates with phase shifted as the
CLKOUT voltage shown in Table 6. The phase shift is latched as
V
k
Dual Output
OPERATION
(Figure 18)
CC
(Figure 19)
(Figure 22)
(Figure 24)
=
29% to 45% of V
45% to 62% of V
VOLTAGE SETTING
TABLE 6. CLKOUT TO PROGRAM PHASE SHIFT AT DUAL-OUTPUT
30A
60A
90A
rises above POR; it cannot be changed on the fly.
------------ 1
0.6V
V
(
<29% of V
62% of V
DDR) memory application, as shown in Figure 20 on
TT
CLKOUT
CC
BETWEEN PHASES
CC
PHASE-SHIFT
CC
CC
TABLE 5. PHASE-SHIFT SETTING
180°
180°
90°
60°
PHASE FOR CLKOUT WRT
23
CHANNEL 1
120°
180°
-60°
90°
VSEN2- VSEN2+ CLKOUT MODE
N/C
VCC
VCC
VCC
N/C
N/C
VCC
N/C
CLKOUT VOLTAGE
RECOMMENDED
VCC
N/C
N/C
N/C
15% V
37% V
53% V
V
CC
ISL8225M
CC
CC
CC
(EQ. 7)
SGND
SGND
N/C
VCC
Layout Guide
To achieve stable operation, low losses, and good thermal
performance, some layout considerations are necessary
(Figure 32).
• VOUT1, VOUT2, PHASE1, PHASE2, PGND, VIN1 and VIN2
• Place high-frequency ceramic capacitors between VIN, VOUT,
• Use remote sensed traces to the regulation point to achieve
• PHASE1 and PHASE2 pads are switching nodes that generate
• Avoid routing any noise-sensitive signal traces, such as the
• Use a separated SGND ground copper area for components
• Optional snubbers can be put on the bottom side of the board
should have large, solid planes. Place enough thermal vias to
connect the power planes in different layers under or around
the module.
and PGND, as closely to the module as possible in order to
minimize high-frequency noise.
tight output voltage regulation, and keep the sensing traces
close to each other in parallel.
switching noise. Keep these pads under the module. For
noise-sensitive applications, it is recommended to keep phase
pads only on the top and inner layers of the PCB. Also, do not
place phase pads exposed to the outside on the bottom layer
of the PCB.
VSEN+, VSEN-, ISHARE, COMP and VMON sensing points, near
the PHASE pins.
connected to signal ground pins. Connect SGND to PGND with
multiple vias underneath the unit in one location to avoid the
noise coupling, as shown in Figure 32. Don't ground vias
surrounded by the noisy planes of VIN, PHASE and VOUT. For
dual output applications, the SGND to PGND vias are preferred
to be as close as possible to SGND pin.
layout, connecting the PHASE to PGND planes, as shown in
Figure 32.
TO LOAD
KELVIN CONNECTIONS
FOR THE V
+
-
CIN2
VIN2
SENS
OPTIONAL SNUBBER
FIGURE 32. RECOMMENDED LAYOUT
R3
PGND
LINES
R4
SGND
PIN 1
COUT2
PHASE2
VOUT2
PGND
VOUT1
PHASE1
COUT1
OPTIONAL SNUBBER
KELVIN CONNECTIONS
FOR THE V
R2
PGND
R1
CIN1
December 3, 2012
SENS
VIN1
LINES
+
-
FN7822.0
TO LOAD

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