DS87C520-WCL+ Maxim Integrated, DS87C520-WCL+ Datasheet - Page 35

• Manufacturer Part Number: DS87C520-WCL+
• Manufacturer: Maxim Integrated

EXPLANATION OF AC SYMBOLS
In an effort to remain compatible with the original 8051 family, the DS87C520 and DS83C520 specify
the same parameters as such devices, using the same symbols. For completeness, the following is an
explanation of the symbols.
POWER-CYCLE TIMING CHARACTERISTICS
EPROM PROGRAMMING AND VERIFICATION
(V
Note 1:
Note 2:
Note 1:
Cycle Startup Time
Power-On Reset Delay
Programming Voltage
Programming Supply Current
Oscillator Frequency
Address Setup to
Address Hold after
Data Setup to
Data Hold after
Enable High to V
V
V
Address to Data Valid
Enable Low to Data Valid
Data Float after Enable
PROG
PROG
t
A
C
D
H
L
CC
PP
PP
= 4.5V to 5.5V, T
Setup to
Hold after
Time
Address
Clock
Input data
Logic level high
Logic level low
Width
High to
PARAMETER
PARAMETER
All voltages are referenced to ground.
Startup time for crystals varies with load capacitance and manufacturer. Time shown is for an 11.0592MHz crystal
manufactured by Fox.
Reset delay is a synchronous counter of crystal oscillations after crystal startup. Counting begins when the level
on the XTAL1 pin meets the V
PROG
PROG
PROG
PROG
PROG
PP
PROG
PROG
Low
Low
Low
A
= +21°C to +27°C.)
Low
SYMBOL
SYMBOL
IH2
1/t
I
P
Q
R
V
t
t
t
t
t
t
t
t
t
t
t
t
criteria. At 33MHz, this time is 1.99ms.
t
t
AVGL
GHAX
DVGL
GHDX
GLGH
AVQV
GHGL
V
ELQV
EHQZ
EHSH
SHGL
SHGL
I
CSU
POR
CLCL
PP
PP
Instruction
PSEN
Output data
RD signal
Valid
48 t
48 t
48 t
48 t
35 of 45
48t
MIN
MIN
12.5
10
10
90
10
4
0
CLCL
CLCL
CLCL
CLCL
CLCL
TYP
TYP
1.8
48 t
48 t
48 t
65,536
MAX
MAX
13.0
110
W
X
Z
50
6
CLCL
CLCL
CLCL
WR signal
No longer a valid logic
level
Tri-State
UNITS
UNITS
MHz
t
mA
CLCL
ms
µs
µs
µs
µs
V
NOTES
NOTES
1
2
1