P520-88OC PLL [PhaseLink Corporation], P520-88OC Datasheet - Page 2

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P520-88OC

Manufacturer Part Number
P520-88OC
Description
Low Phase Noise VCXO (9.5-65MHz)
Manufacturer
PLL [PhaseLink Corporation]
Datasheet
PIN AND PAD ASSIGNMENT
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 2
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
OE_CTRL
GNDBUF
GNDBUF
VDDBUF
VCON
XOUT
QBAR
Name
VDD
DNC
GND
DNC
DNC
XIN
S2
Q
Pin#
10
11
12
13
14
15
16
1
2
3
4
5
6
8
9
PARAMETERS
Power Supply.
Crystal input. See Crystal Specification on page 3.
Crystal output. See Crystal Specification on page 3.
Do Not Connect.
Output Divide by Two selector pin. See the OUTPUT DIVIDE BY TWO SELECTOR Table on
page 1.
Output Enable input. See OUTPUT SELECTION AND ENABLE TABLE on page 1.
Voltage control input.
Ground.
Ground for output buffer circuitry.
PECL or LVDS output.
Power supply for output buffer circuitry.
Complementary PECL or LVDS output.
Ground for output buffer circuitry.
Do Not Connect.
Do Not Connect.
Low Phase Noise VCXO (9.5-65MHz)
SYMBOL
Description
V
V
T
T
V
T
Preliminary
DD
O
S
A
J
I
MIN.
PLL520-88/-89
-0.5
-0.5
-65
-40
V
V
MAX.
DD
DD
150
125
260
4.6
85
2
+0.5
+0.5
UNITS
°C
°C
°C
°C
kV
V
V
V

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