AX88772_07 ASIX [ASIX Electronics Corporation], AX88772_07 Datasheet - Page 24
AX88772_07
Manufacturer Part Number
AX88772_07
Description
USB to 10/100 Fast Ethernet/HomePNA Controller
Manufacturer
ASIX [ASIX Electronics Corporation]
Datasheet
1.AX88772_07.pdf
(43 pages)
- Current page: 24 of 43
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6.2.1.15 Multicast Filter Array (15h, read only and 16h, write only)
6.2.1.16 Test Register (17h, write only)
6.2.1.17 Ethernet / HomePNA Phy Address Register (19h, read only)
{MA7 [7:0], MA6 [7:0], MA5 [7:0], MA4 [7:0], MA3 [7:0], MA2 [7:0], MA1 [7:0], MA0 [7:0]} = the multicast
address bit map for multicast frame filtering block. See Figure 5: Multicast Filter Example, for example.
LDRND: Load Random number into MAC’s exponential back-off timer. User writes a “1” to enable the ASIC to load
MM [7:6]: Reserved.
SecPhyType, SecPhyID: The Secondary PHY address loaded from serial EEPROM’s offset address 11h.
PriPhyType, PriPhyID: The Primarily PHY address loaded from serial EEPROM’s offset address 11h.
Bit7
Bit7
Bit7
SecPhyType [2:0]
PriPhyType [2:0]
a small random number into MAC’s back-off timer to shorten the back-off duration in each retry after
collision. This register is used for test purpose. Default value = 0.
Bit6
Bit6
Bit6
Bit5
Bit5
Bit5
Figure 5: Multicast Filter Example
MM [7:6]
{crc31, 30, 29, 28, 27, 26}
USB to 10/100 Fast Ethernet/HomePNA Controller
Bit4
Bit4
Bit4
81 81 81 81 81 81
MA 0 [7:0]
MA 1 [7:0]
MA 2 [7:0]
MA 4 [7:0]
MA 5 [7:0]
MA 7 [7:0]
MA 3 [7:0]
MA 6 [7:0]
MAR[63:0] =
400_0000h
CRC32
DA
Bit3
Bit3
Bit3
Address[5:0] = 1Ah
24
SecPhyID [4:0]
PriPhyID [4:0]
Bit2
Bit2
Bit2
ASIX ELECTRONICS CORPORATION
Bit1
Bit1
Bit1
LDRND
Bit0
Bit0
Bit0
AX88772
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