AX88772_07 ASIX [ASIX Electronics Corporation], AX88772_07 Datasheet - Page 20

• Manufacturer Part Number: AX88772_07
• Description: USB to 10/100 Fast Ethernet/HomePNA Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

6.2.1 Detailed Register Description
6.2.1.1 Rx/Tx SRAM Read Register (02h, read only)
6.2.1.2 Rx/Tx SRAM Write Register (03h, write only)
6.2.1.3 Software Serial Management Control Register (06h, write only)
{B [3:0], AA [7:0]}: The write address of RX or TX SRAM.
C [0]: RAM selection.
{DD [7:0], EE [7:0], FF [7:0], GG [7:0], HH [7:0], II [7:0], JJ [7:0], KK [7:0]}: The 64-bits of data presented in Data
stage are the data to be written to RX or TX SRAM.
{DD [7:0], EE [7:0], FF [7:0], GG [7:0], HH [7:0], II [7:0], JJ [7:0], KK [7:0]}: The 64-bits of data presented in Data
stage are the data to be written to RX or TX SRAM.
{B [3:0], AA [7:0]}: The read address of RX or TX SRAM.
C [0]: RAM selection.
C [3:1]: Reserved.
C [3:1]: Reserved.
When software needs to access to Ethernet PHY’s internal registers, one has to first issue this command to request the
ownership of Serial Management Interface. The ownership status of the interface can be retrieved from Serial
Management Status Register.
0: indicates to read from RX SRAM.
1: indicates to read from TX SRAM.
0: indicates to write to RX SRAM.
1: indicates to write to TX SRAM.
Bit7
Bit7
Bit6
Bit6
Reserved
Reserved
Reserved
0h
Bit5
Bit5
DD [7:0] in Data stage
GG [7:0] in Data stage
HH [7:0] in Data stage
KK [7:0] in Data stage
DD [7:0] in Data stage
GG [7:0] in Data stage
HH [7:0] in Data stage
KK [7:0] in Data stage
EE [7:0] in Data stage
EE [7:0] in Data stage
FF [7:0] in Data stage
FF [7:0] in Data stage
JJ [7:0] in Data stage
JJ [7:0] in Data stage
II [7:0] in Data stage
II [7:0] in Data stage
USB to 10/100 Fast Ethernet/HomePNA Controller
Bit4
Bit4
AA [7:0]
AA [7:0]
Bit3
Bit3
20
Bit2
Bit2
B [3:0]
C [3:0]
B [3:0]
C [3:0]
ASIX ELECTRONICS CORPORATION
Bit1
Bit1
Bit0
Bit0
AX88772