HY5PS1G831LF-C4 HYNIX [Hynix Semiconductor], HY5PS1G831LF-C4 Datasheet - Page 18
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HY5PS1G831LF-C4
Manufacturer Part Number
HY5PS1G831LF-C4
Description
1Gb DDR2 SDRAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.HY5PS1G831LF-C4.pdf
(33 pages)
Rev. 1.2 / Dec 2006
3.5. Input/Output Capacitance
4. Electrical Characteristics & AC Timing Specification
( 0 ℃ ≤ T
Refresh Parameters by Device Density
DDR2 SDRAM speed bins and tRCD, tRP and tRC for corresponding bin
Note 1: 8 bank device Precharge All Allowance : tRP for a Precharge All command for and 8 Bank device
will equal to tRP+1*tCK, where tRP are the values for a single bank prechrarge, which are shown in the
above table.
Refresh to Active/Refresh command
Input capacitance, CK and CK
Input capacitance delta, CK and CK
Input capacitance, all other input-only pins
Input capacitance delta, all other input-only pins
Input/output capacitance, DQ, DM, DQS, DQS
Input/output capacitance delta, DQ, DM, DQS, DQS
Average periodic refresh interval
CASE
Parameter
Bin(CL-tRCD-tRP)
time
CAS Latency
≤ 95℃; V
Parameter
tRPNote1
Speed
tRCD
tRAS
tRC
Parameter
DDQ
= 1.8 V +/- 0.1V; V
tREFI
0 ℃≤ T
85℃< T
Symbol
tRFC
CASE
DDR2-667
CASE
5-5-5
min
15
15
45
60
DD
5
≤ 95℃
≤ 95℃
= 1.8V +/- 0.1V)
CCK
CDCK
CI
CDI
CIO
CDIO
Symbol
256Mb 512Mb
7.8
3.9
75
DDR2-533
Min
1.0
1.0
2.5
x
x
x
4-4-4
DDR2 400
DDR2 533
min
15
15
45
60
4
105
7.8
3.9
Max
0.25
0.25
2.0
2.0
4.0
0.5
127.5
1Gb
7.8
3.9
1HY5PS1G431(L)F
1HY5PS1G831(L)F
DDR2-400
2Gb
Min
1.0
1.0
2.5
195
7.8
3.9
x
x
x
3-3-3
DDR2 667
DDR2 800
min
15
15
40
55
3
327.5
4Gb
7.8
3.9
Max
0.25
0.25
2.0
2.0
3.5
0.5
Units
Units
tCK
ns
ns
ns
ns
Units
ns
ns
ns
pF
pF
pF
pF
pF
pF
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