FX629J CMLMICRO [CML Microcircuits], FX629J Datasheet - Page 3

• Manufacturer Part Number: FX629J
• Description: Delta Modulation Codec
• Manufacturer: CMLMICRO [CML Microcircuits]

Pin Number Function
FX629J
12
13
14
15
16
17
18
19
20
21
22
No connection
Decoder Output : The recovered analogue signal is output at this pin, it is the buffered
output of a bandpass filter and requires external components. During "Powersave" this
output is o/c.
No connection
Powersave : A logical '0' at this pin puts most parts of the codec into a quiescent non-
operational state. When at a logical '1' the codec operates normally. Internal 1M
Decoder Force Idle : A logical '0' at this pin gates a 0101...pattern internally to the
decoder so that the decoder output goes to V
decoder operates as normal. Internal 1M
Decoder Input : The received digital signal input. Internal 1M
Decoder Data Clock : A Logic I/O port. External decode clock input or internal data clock
output, dependant upon clock mode 1, 2 inputs, see Clock Mode pins.
Algorithm : A logical '1' at this pin sets this device for a 3-bit companding algorithm. A
logical '0' sets a 4-bit companding algorithm. Internal 1M
Clock Mode 2 :
Clock Mode 1 :
Internal 1M
Pullups.
Clock rates refer to f = 1.024 MHz Xtal/clock input. During internal operation the data clock
frequencies are available at the ports for external circuit synchronization.
Independent or common data rate inputs to Encode and Decode data clock ports may be
employed in the External Clocks mode. Optimum performance will be achieved when the
applied external clocks are synchronous with the master Xtal/clock, and a sub-multiple of
128kHz.
V
DD
: Positive Supply. A single + 5 volt power supply is required.
Clock Mode 1
0
0
1
1
3
Pullup.
Clock Mode 2
DD
/2. When this pin is at a logical '1' the
0
1
0
1
Pullup.
Pullup.
Facility
External clocks
Internal, 64kb/s = f
Internal, 32kb/s = f
Internal, 16kb/s = f
Pullup.
16
32
64