W245 CYPRESS [Cypress Semiconductor], W245 Datasheet - Page 3

• Manufacturer Part Number: W245
• Description: Frequency Multiplying, Peak Reducing EMI Solution
• Manufacturer: CYPRESS [Cypress Semiconductor]

Table 1. Frequency Configuration (Frequencies in MHz)
Table 2. Modulation Width Selection Table
Overview
The W245-30 product is one of a series of devices in the Cy-
press PREMIS family. The PREMIS family incorporates the
latest advances in PLL spread spectrum frequency synthesiz-
er techniques. By frequency modulating the output with a low
frequency carrier, peak EMI is greatly reduced. Use of this
technology allows systems to pass increasingly difficult EMI
testing without resorting to costly shielding or redesign.
In a system, not only is EMI reduced in the various clock lines,
but also in all signals which are synchronized to the clock.
Therefore, the benefits of using this technology increase with
the number of address and data lines in the system. The Sim-
plified Block Diagram shows a simple implementation.
Functional Description
The W245-30 uses a phase locked loop (PLL) to frequency
modulate an input clock. The result is an output clock whose
frequency is slowly swept over a narrow band near the input
signal. The basic circuit topology is shown in Figure 1. The
input reference signal is divided by Q and fed to the phase
detector. A signal from the VCO is divided by P and fed back
to the phase detector also. The PLL will force the frequency of
the VCO output signal to change until the divided output signal
and the divided reference signal match at the phase detector
input. The output frequency is then equal to the ratio of P/Q
Document #: 38-07229 Rev. *B
Min.
Power Down Hi-Z
Maximum EMI reduction
14
14
14
25
25
25
50
50
50
Minimum EMI Control
Power Down 0
Power Down 1
Range of Fin
Frequency
Suggested Setting
Reserved
Alternate Setting
EMI Reduction
Max.
120
120
120
30
30
30
60
60
60
OR2
Multiplier
0
1
1
0
1
1
0
1
1
0
0
0
0
Settings
Modulation Setting
MW2
0
0
1
1
OR1
1
0
1
1
0
1
1
0
1
0
0
0
0
MW1
Output /
0
1
0
1
Input
0.25
N/A
N/A
N/A
N/A
0.5
0.5
1
2
4
1
2
1
Range of Fout
98.75%
97.5%
95.0%
90.0%
times the reference frequency. (Note: For the W245-30 the
output frequency is nominally equal to the input frequency.)
The unique feature of the Spread Spectrum Frequency Timing
Generator is that a modulating waveform is superimposed at
the input to the VCO. This causes the VCO output to be slowly
swept across a predetermined frequency band.
Because the modulating frequency is typically 1000 times
slower than the fundamental clock, the spread spectrum pro-
cess has little impact on system performance.
Frequency Selection With SSFTG
In Spread Spectrum Frequency Timing Generation, EMI re-
duction depends on the shape, modulation percentage, and
frequency of the modulating waveform. While the shape and
frequency of the modulating waveform are fixed for a given
frequency, the modulation percentage may be varied.
Using frequency select bits (FS2:1 pins), the frequency range
can be set (see Table 2). Spreading percentage is set with pins
MW0:2 as shown in Table 2.
A larger spreading percentage improves EMI reduction. How-
ever, large spread percentages may either exceed system
maximum frequency ratings or lower the average frequency to
a point where performance is affected. For these reasons,
spreading percentage options are provided.
Min.
Low
N/A
N/A
N/A
N/A
14
28
56
13
25
50
13
25
50
Bandwith Limit Frequencies as a% Value of Fout
MW0 = 0
Max.
120
120
120
N/A
N/A
N/A
N/A
30
60
30
60
30
60
100%
100%
100%
100%
High
As Set
As Set
As Set
As Set
IR2
0
0
0
1
1
1
1
1
1
Required R
Settings
99.375%
97.5%
98.75
95%
Low
As Set
As Set
As Set
As Set
IR1
1
1
1
0
0
0
1
1
1
MW0 = 1
Modulation & Pow-
MW2
er Down Settings
1
1
0
0
101.25%
100.625
102.5%
105%
Table 2
Table 2
Table 2
Table 2
Table 2
Table 2
Table 2
Table 2
Table 2
High
W245-30
Page 3 of 12
MW1
0
1
0
1