EM78159NAS EMC [ELAN Microelectronics Corp], EM78159NAS Datasheet - Page 11

• Manufacturer Part Number: EM78159NAS
• Description: 8-Bit Microcontroller with OTP ROM
• Manufacturer: EMC [ELAN Microelectronics Corp]

Product Specification (V1.0) 03.10.2006
(This specification is subject to change without further notice)
4.1.3 R2 (Program Counter) & Stack
"ADD R2, A" allows a relative address to be added to the current PC, and the ninth
and succeeding bits of the PC will increase progressively.
"MOV R2, A" allows loading of an address from the "A" register to the lower 8 bits of
the PC, and the ninth and tenth bits (A8 ~ A9) of the PC will remain unchanged.
Any instruction (except “ADD R2,A”) that is written to R2 (e.g., "MOV R2, A", "BC
R2, 6",⋅⋅⋅⋅⋅) will cause the ninth bit and the tenth bit (A8 ~ A9) of the PC to remain
unchanged.
structure is depicted in the following figure.
Depending on the device type, R2 and hardware stack are 10-bit wide. The
Generating 1024×13 bits on-chip OTP ROM addresses to the relative
programming instruction codes. One program page is 1024 words long.
R2 is set as all "0" when under RESET condition.
"JMP" instruction allows direct loading of the lower 10 program counter bits.
Thus, "JMP" allows PC to go to any location within a page.
"CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed
into the stack. Thus, the subroutine entry address can be located anywhere
within a page.
"RET" ("RETLk", "RETI") instruction loads the program counter with the contents
of the top-level stack.
All instructions are single instruction cycle (fclk/2 or fclk/4) except for the
instruction that would change the contents of R2. Such instruction will need one
more instruction cycle.
Stack Level 1
Stack Level 2
Stack Level 3
Stack Level 4
Stack Level 5
PC (A9 ~ A0)
Figure 4-2 Program Counter Organization
On-chip Program
Interrupt Vector
Memory
Reset Vector
8-Bit Microcontroller with OTP ROM
000H
008H
3FFH
EM78P159N
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