K9K1G08U0B Samsung semiconductor, K9K1G08U0B Datasheet - Page 38

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K9K1G08U0B

Manufacturer Part Number
K9K1G08U0B
Description
128M x 8 Bit NAND Flash Memory
Manufacturer
Samsung semiconductor
Datasheet

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RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. Refer to table 5 for device status after reset operation. If the device is
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for tRST
after the Reset command is written. Refer to Figure 21 below.
Figure 21. RESET Operation
Table5. Device Status
R/B
I/O
K9K1G08R0B
K9K1G08B0B
K9K1G08U0B
0
~
7
Operation Mode
FFh
After Power-up
Read 1
t
RST
38
Waiting for next command
FLASH MEMORY
After Reset
Advance

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