SFSL5.5MDB YAMAR [Yamar Electronics Ltd.], SFSL5.5MDB Datasheet - Page 4

• Manufacturer Part Number: SFSL5.5MDB
• Description: Smart Slave for DC-BUS Powerline Network
• Manufacturer: YAMAR [Yamar Electronics Ltd.]

© 2010 Yamar Electronics Ltd.
Preliminary and proprietary Information of YAMAR Electronics Ltd. Subject to change without notice.
OscIn
RxN
RxP
DTxO
RxIn
TxO
F0B
F1B
TxOn
RxOn
In0
In1
In2_HDI
In3_HDC
In4
In5
In6
In7
Out0
Out1
Out2
Out3
Out4
Out5
Out6
Out7
Id0
Id1
Id2
Id3
53
61
45
10
59
58
20
17
47
44
42
41
40
39
37
36
28
27
25
24
22
21
19
18
16
14
13
12
9
8
Analog, Bi
directional
Analog, Bi
directional
Input PD
Input PD
Input PD
Input PD
Input PD
Input PD
Input PD
Input PD
Input PD
Input PD
Tristate/
Analog
Analog
Analog
Analog
Analog
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
12mA
12mA
Input
Input
Input
Input
Input
2mA
8mA
8mA
8mA
8mA
8mA
8mA
8mA
8mA
Crystal Input
The internal comparator negative pin. Its value is internally pulled to
Vdd/2. Bypass RxN to Ground with a 1nF capacitor.
Positive pin input signal. Should be tied to RxN with a 1K Ohm
resistor.
Modulated digital transmit signal output to both ceramic filters.
Receive input
input is pulled internally to Vdd/2.
Transmit output.
F0 External filter I/O. Its value is internally pulled to Vdd/2.
F1 External filter I/O. Its value is internally pulled to Vdd/2.
HIGH when the device is transmitting a message.
HIGH when the device is in receive mode.
The pin is read by the Master with a Read or Read-Change
command.
The pin is read by the Master with a Read or Read-Change
command.
The pin is read by the Master with a Read or Read-Change
command.
The pin is read by the Master with a Read or Read-Change
command.
The pin is read by the Master with a Read or Read-Change
command.
The pin is read by the Master with a Read or Read-Change
command.
The pin is read by the Master with a Read or Read-Change
command.
The pin is read by the Master with a Read or Read-Change
command.
Output of data bit 0 when the Write command received from Master.
Output of data bit 1 when the Write command received from Master.
Output of data bit 2 when the Write command received from Master.
Output of data bit 3 when the Write command received from Master.
Output of data bit 4 when the Write command received from Master.
Output of data bit 5 when the Write command received from Master.
Output of data bit 6 when the Write command received from Master.
Output of data bit 7 when the Write command received from Master.
SIG61 bit 0 ID address in the network.
SIG61 bit 1 ID address in the network.
SIG61 bit 2 ID address in the network.
SIG61 bit 3 ID address in the network.
When in SIG60 mode, HDI input.
When in SIG60 mode, HDC input.
from the DC-BUS to the RX operational amplifier. This
4
Configuration Signals
I/O Signals
DS-SIG61 R0.932