MACH111-14 AMD [Advanced Micro Devices], MACH111-14 Datasheet - Page 8

• Manufacturer Part Number: MACH111-14
• Description: High-Performance EE CMOS Programmable Logic
• Manufacturer: AMD [Advanced Micro Devices]

FUNCTIONAL DESCRIPTION
The MACH111 consists of two PAL blocks connected by a switch matrix. There are 32 I/O pins
and 2 dedicated input pins feeding the switch matrix. These signals are distributed to the two
PAL blocks for efficient design implementation. There are four clock pins that can also be used
as dedicated inputs.
The PAL Blocks
Each PAL block in the MACH111 (Figure 1) contains a 64-product-term logic array, a logic
allocator, 16 macrocells, and 16 I/O cells. The switch matrix feeds each PAL block with 26 inputs.
This makes the PAL block look effectively like an independent “PALCE26V16.”
There are four additional output enable product terms in each PAL block. For purposes of output
enable, the 16 I/O cells are divided into 2 banks of 8 macrocells. Each bank is allocated two of
the output enable product terms.
An asynchronous reset product term and an asynchronous preset product term are provided for
flip-flop initialization. All flip-flops within the PAL block are initialized together.
The Switch Matrix
The MACH111 switch matrix is fed by the inputs and feedback signals from the PAL blocks. Each
PAL block provides 16 internal feedback signals and 16 I/O feedback signals. The switch matrix
distributes these signals back to the PAL blocks in an efficient manner that also provides for high
performance. The design software automatically configures the switch matrix when fitting a
design into the device.
The Product-term Array
The MACH111 product-term array consists of 64 product terms for logic use, and 6
special-purpose product terms. Four of the special-purpose product terms provide
programmable output enable; one provides asynchronous reset, and one provides asynchronous
preset. Two of the output enable product terms are used for the first eight I/O cells; the other
two control the last eight macrocells.
The Logic Allocator
The logic allocator in the MACH111 takes the 64 logic product terms and allocates them to the
16 macrocells as needed. Each macrocell can be driven by up to 12 product terms. The design
software automatically configures the logic allocator when fitting the design into the device.
Table 1 illustrates which product term clusters are available to each macrocell within a PAL
block. Refer to Figure 1 for cluster and macrocell numbers.
8
Output Macrocell
M
M
M
M
M
M
M
M
0
1
2
3
4
5
6
7
Available Clusters
C
C
C
C
C
C
0
1
2
3
4
5
C
C
, C
, C
, C
, C
, C
, C
0
6
, C
, C
Table 1. Logic Allocation
1
2
3
4
5
6
MACH111-5/7/10/12/15
, C
, C
, C
, C
, C
, C
1
7
2
3
4
5
6
7
Output Macrocell
M
M
M
M
M
M
M
M
10
11
12
13
14
15
8
9
Available Clusters
C
C
C
C
C
C
10
11
12
13
9
8
C
, C
C
, C
, C
, C
, C
, C
14
8
, C
10
, C
9
11
12
13
14
, C
, C
, C
, C
, C
, C
9
15
10
11
12
13
14
15