K6R4004C1C-C10 SAMSUNG [Samsung semiconductor], K6R4004C1C-C10 Datasheet - Page 2

• Manufacturer Part Number: K6R4004C1C-C10
• Description: 1Mx4 Bit High Speed Static RAM(5V Operating).
• Manufacturer: SAMSUNG [Samsung semiconductor]

ORDERING INFORMATION
FUNCTIONAL BLOCK DIAGRAM
1M x 4 Bit (with OE)High-Speed CMOS Static RAM
FEATURES
K6R4004C1C-C, K6R4004C1C-I, K6R4004C1C-E
• Fast Access Time 10,12,15,20ns(Max.)
• Low Power Dissipation
• Single 5.0V 10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
• Three State Outputs
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
A
A
A
A
A
A
A
A
A
A
CS
WE
OE
- No Clock or Refresh required
K6R4004C1C-C10/C12/C15/C20
K6R4004C1C-E10/E12/E15/E20
K6R4004C1C-I10/I12/I15/I20
Standby (TTL)
0
1
2
3
4
5
6
7
8
9
Operating
I/O
1
~I/O
4
(CMOS) : 10mA(Max.)
K6R4004C1C-J : 32-SOJ-400
K6R4004C1C-12 : 150mA(Max.)
K6R4004C1C-15 : 140mA(Max.)
Clk Gen.
K6R4004C1C-10 : 160mA(Max.)
K6R4004C1C-20 : 130mA(Max.)
: 60mA(Max.)
Cont.
Data
Gen.
CLK
A
10
A
11
Pre-Charge Circuit
A
1024 x 4 Columns
12
Column Select
Memory Array
A
Commercial Temp.
Extended Temp.
Industrial Temp.
1024 Rows
13
I/O Circuit
A
14
A
15
A
16
A
17
A
18
A
19
- 2 -
PIN CONFIGURATION
GENERAL DESCRIPTION
The K6R4004C1C is a 4,194,304-bit high-speed Static Random
Access Memory organized as 1,048,576 words by 4 bits. The
K6R4004C1C uses 4 common input and output lines and has
an output enable pin which operates faster than address
access time at read cycle. The device is fabricated using SAM-
SUNG s advanced CMOS process and designed for high-
speed circuit technology. It is particularly well suited for use in
high-density
K6R4004C1C is packaged in a 400 mil 32-pin plastic SOJ.
PIN FUNCTION
I/O
Pin Name
A
0
1
V
N.C
WE
V
OE
CS
I/O
I/O
Vcc
Vss
WE
CS
A
A
A
A
A
A
A
A
A
A
- A
~ I/O
CC
SS
0
1
2
3
4
5
6
7
8
9
1
2
19
4
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
high-speed
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power(+5.0V)
Ground
No Connection
SOJ
system
(Top View)
PRELIMINARY
Pin Function
CMOS SRAM
applications.
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
I/O
I/O
N.C
A
A
A
A
A
Vss
Vcc
A
A
A
A
A
OE
19
18
17
16
15
14
13
12
11
10
March 2000
4
3
Rev 3.0
The