LV4904V SANYO [Sanyo Semicon Device], LV4904V Datasheet - Page 16

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LV4904V

Manufacturer Part Number
LV4904V
Description
Digital Input Class-D Power Amplifier
Manufacturer
SANYO [Sanyo Semicon Device]
Datasheet
5. I
5.1 Overview of I
5.2 I
5.3 Data write
The LV4904V supports the standard I
(read) and 11011001 (write). Its I
the state in which both pins are high, by holding the SCL pin state to high and setting the SDA to low, communication
is started. This is referred to as the start condition.
To end I
referred to as the stop condition.
master to the LV4904V at the slave, and the LV4904V responds every time 8 bits are received by setting the SDA pin
to low. This is referred to as acknowledge (ACK). The master sets the bus free and waits for ACK.
To write data in the LV4904V, the device ID, write address and data are sent in this sequence after the start condition
has been sent, and lastly the stop condition is sent. The read/write flag bit is added to the 7-bit device ID, and the write
mode is established according to setting this bit too low.
In the bus-free state where there is no I
Data transfer is started after the start condition has been transmitted. The data is transferred in 8-bit units from the
2
C Bus Specifications
2
C bus transfer rules
2
C transmission or reception, change the SDA pin state from low to high with the SCL still high. This is
start
2
C bus interface
SCL
SDA
1
SCL
SDA
SCL
SDA
1
Device ID=1101100
H
H
0
Bus Free
1
1
2
C bus interface does not function as the master but operates only as a slave.
ACK
0
2
0
C bus interface (max. 100 kHz). The device ID of the LV4904V is 11011000
2
C transmission or reception, both the SCL and SDA pins must be high. From
R/W ACK
LV4904V
Start
Condition
Data is transsferred in 8-bit unit. The LV4904V returns
ACK each time it has received 8-bit data.
LV4904V
Write address
Stop
Condition
LV4904V
ACK
Bus Free
Write Data
ACK
H
H
LV4904V
ACK
No.A1963-16/25
stop

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