LUCW3000CCN AGERE [Agere Systems], LUCW3000CCN Datasheet - Page 3

• Manufacturer Part Number: LUCW3000CCN
• Description: W3000 PLL Dual-Band Frequency Synthesizer
• Manufacturer: AGERE [Agere Systems]

Advance Data Sheet
December 1999
Description
The W3000 is a high-performance UHF RF PLL synthesizer, designed for use in digital wireless communication
applications. Particular emphasis in the design has been placed on dual-band applications, with near-seamless
switching between operational bands without the need for external loop-filter circuitry other than that required for
single band applications. In combination with a suitable reference crystal, UHF VCO, and associated loop-filter
components, the W3000 offers a very low-noise oscillator solution.
The reference signal is divided by a programmable 11-bit counter to provide a wide range of comparison
frequencies, allowing compliance with the various standards. The reference input is rising-edge triggered, and we
recommend that an inverting buffer be used when the W3000 is interfaced to a commercial TCXO.
The MAIN_IN signal normally associated with the UHF VCO is fed into a dual modulus prescaler (64/65) and is
then divided by the 11-bit main counter to be compared to the output of the reference counter in a digital phase
detector.
The W3000 is implemented with programmable charge-pump currents to allow fast switching between bands for
dual-band applications, without changing the loop filter. The charge pump can be programmed internally, or
externally with a resistor (recommended). Charge pump outputs can be disabled, thereby allowing open-loop
VCO modulation schemes.
With synchronous reloading, the counter reloads a new programmed value when the counter reaches zero. With
forced counter reloading, the reloading occurs when the programmed word is latched in. These techniques can
improve lock time when performing a dual-band hop or in start-up conditions.
The W3000 uses a standard 3-wire programming bus (data, enable, clock) that operates up to 10 MHz. This
serial interface is via a 24-bit word that incorporates both register addressing and device addressing allowing two
chips to share the bus.
Lucent Technologies Inc.
W3020
W3000
MAIN REGISTER
CONFIG REGISTER
REF REGISTER
MAIN REGISTER
TR REGISTER
Figure 2. Serial Bus Programming
PARALLEL LATCH
SERIAL SHIFT
PARALLEL LATCH
SERIAL SHIFT
A[0:2]
A[0:2]
W3000 PLL Dual-Band Frequency Synthesizer
DAT
CLK
LAT
LAT
CLK
DAT
SC1
SERLE1
SERCK
SERDA
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