K9F4G08U0M SAMSUNG [Samsung semiconductor], K9F4G08U0M Datasheet - Page 31

• Manufacturer Part Number: K9F4G08U0M
• Description: 512M x 8 Bits / 1G x 8 Bits NAND Flash Memory
• Manufacturer: SAMSUNG [Samsung semiconductor]

K9K8G08U1M
K9F4G08U0M
Device Operation
PAGE READ
Read mode is initiated by writing 00h-30h to the command register along with five address cycles. In two consecutive read opera-
tions, the second one doesn’t need 00h command, which five address cycles and 30h command initiates that operation. Once the
command is latched, it does not need to be written for the following page read operation. Two types of operations are available : ran-
dom read out, serial page read out.
The random read mode is enabled when the page address is changed. The 2,112 bytes of data within the selected page are trans-
ferred to the data registers in less than 20µs(t
the output of R/B pin. Once the data in a page is loaded into the data registers, they may be read out in 25ns cycle time by sequen-
tially pulsing RE. The repetitive high to low transitions of the RE clock make the device output the data starting from the selected col-
umn address up to the last column address.
The device may output random data in a page instead of the consecutive sequential data by writing random data output command.
The column address of next data, which is going to be out, may be changed to the address which follows random data output com-
mand. Random data output can be operated multiple times regardless of how many times it is done in a page.
Figure 6. Read Operation
I/Ox
CLE
CE
WE
ALE
R/B
RE
00h
Col. Add.1,2 & Row Add.1,2,3
Address(5Cycle)
R
). The system controller can detect the completion of this data transfer(tR) by analyzing
30h
Data Field
t
R
31
Spare Field
Data Output(Serial Access)
FLASH MEMORY
Advance