LIS302DL_08 STMICROELECTRONICS [STMicroelectronics], LIS302DL_08 Datasheet - Page 17

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LIS302DL_08

Manufacturer Part Number
LIS302DL_08
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
LIS302DL
4
4.1
Application hints
Figure 5.
The device core is supplied through Vdd line while the I/O pads are supplied through
Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 µF Al) should be
placed as near as possible to the pin 6 of the device (common design practice).
All the voltage and ground supplies must be present at the same time to have proper
behavior of the IC (refer to
without blocking the communication busses, in this condition the measurement chain is
powered off.
The functionality of the device and the measured acceleration data is selectable and
accessible through the I
The functions, the threshold and the timing of the two interrupt pins (INT 1 and INT 2) can be
completely programmed by the user though the I
Soldering information
The LGA package is compliant with the ECOPACK®, RoHS and “Green” standard. It is
qualified for soldering heat resistance according to JEDEC J-STD-020C.
Leave “Pin 1 Indicator” unconnected during soldering.
Land pattern and soldering recommendation are available at www.st.com/mems.
Vdd
GND
10uF
100nF
LIS302DL electrical connection
Digital signal from/to signal controller.Signal’s levels are defined by proper selection of Vdd_IO
2
C/SPI interface.When using the I
Figure
8
5). It is possible to remove Vdd maintaining Vdd_IO
6
Top VIEW
2
C/SPI interface.
1
13
2
C, CS must be tied high.
Vdd_IO
Y
DIRECTIONS OF THE
DETECTABLE
ACCELERATIONS
6
TOP VIEW
Application hints
Z
8
1
13
17/42
X

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